/* Restore back i2c now speed set */
if (ena == IC_ENABLE_0B)
dw_i2c_enable(i2c_base, true);
+ if (priv)
+ priv->config = config;
+
+ return 0;
+}
+
+int dw_i2c_gen_speed_config(const struct udevice *dev, int speed_hz,
+ struct dw_i2c_speed_config *config)
+{
+ struct dw_i2c *priv = dev_get_priv(dev);
+ ulong rate;
+ int ret;
+
+#if CONFIG_IS_ENABLED(CLK)
+ rate = clk_get_rate(&priv->clk);
+ if (IS_ERR_VALUE(rate))
+ return log_msg_ret("clk", -EINVAL);
+#else
+ rate = IC_CLK;
+#endif
+
+ ret = calc_bus_speed(priv, priv->regs, speed_hz, rate, config);
+ if (ret)
+ printf("%s: ret=%d\n", __func__, ret);
+ if (ret)
+ return log_msg_ret("calc_bus_speed", ret);
return 0;
}
#include <dm.h>
#include <log.h>
#include <spl.h>
+#include <acpi/acpigen.h>
+#include <acpi/acpi_device.h>
#include <asm/lpss.h>
+#include <dm/acpi.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
#include "designware_i2c.h"
enum {
{
char name[20];
+ if (dev_of_valid(dev))
+ return 0;
+
/*
* Create a unique device name for PCI type devices
* ToDo:
* be possible. We cannot use static data in drivers since they may be
* used in SPL or before relocation.
*/
- dev->req_seq = gd->arch.dw_i2c_num_cards++;
+ dev->req_seq = uclass_find_next_free_req_seq(UCLASS_I2C);
sprintf(name, "i2c_designware#%u", dev->req_seq);
device_set_name(dev, name);
return 0;
}
+/*
+ * Write ACPI object to describe speed configuration.
+ *
+ * ACPI Object: Name ("xxxx", Package () { scl_lcnt, scl_hcnt, sda_hold }
+ *
+ * SSCN: I2C_SPEED_STANDARD
+ * FMCN: I2C_SPEED_FAST
+ * FPCN: I2C_SPEED_FAST_PLUS
+ * HSCN: I2C_SPEED_HIGH
+ */
+static void dw_i2c_acpi_write_speed_config(struct acpi_ctx *ctx,
+ struct dw_i2c_speed_config *config)
+{
+ switch (config->speed_mode) {
+ case IC_SPEED_MODE_HIGH:
+ acpigen_write_name(ctx, "HSCN");
+ break;
+ case IC_SPEED_MODE_FAST_PLUS:
+ acpigen_write_name(ctx, "FPCN");
+ break;
+ case IC_SPEED_MODE_FAST:
+ acpigen_write_name(ctx, "FMCN");
+ break;
+ case IC_SPEED_MODE_STANDARD:
+ default:
+ acpigen_write_name(ctx, "SSCN");
+ }
+
+ /* Package () { scl_lcnt, scl_hcnt, sda_hold } */
+ acpigen_write_package(ctx, 3);
+ acpigen_write_word(ctx, config->scl_hcnt);
+ acpigen_write_word(ctx, config->scl_lcnt);
+ acpigen_write_dword(ctx, config->sda_hold);
+ acpigen_pop_len(ctx);
+}
+
+/*
+ * Generate I2C timing information into the SSDT for the OS driver to consume,
+ * optionally applying override values provided by the caller.
+ */
+static int dw_i2c_acpi_fill_ssdt(const struct udevice *dev,
+ struct acpi_ctx *ctx)
+{
+ struct dw_i2c_speed_config config;
+ char path[ACPI_PATH_MAX];
+ u32 speeds[4];
+ uint speed;
+ int size;
+ int ret;
+
+ /* If no device-tree node, ignore this since we assume it isn't used */
+ if (!dev_of_valid(dev))
+ return 0;
+
+ ret = acpi_device_path(dev, path, sizeof(path));
+ if (ret)
+ return log_msg_ret("path", ret);
+
+ size = dev_read_size(dev, "i2c,speeds");
+ if (size < 0)
+ return log_msg_ret("i2c,speeds", -EINVAL);
+
+ size /= sizeof(u32);
+ if (size > ARRAY_SIZE(speeds))
+ return log_msg_ret("array", -E2BIG);
+
+ ret = dev_read_u32_array(dev, "i2c,speeds", speeds, size);
+ if (ret)
+ return log_msg_ret("read", -E2BIG);
+
+ speed = dev_read_u32_default(dev, "clock-frequency", 100000);
+ acpigen_write_scope(ctx, path);
+ ret = dw_i2c_gen_speed_config(dev, speed, &config);
+ if (ret)
+ return log_msg_ret("config", ret);
+ dw_i2c_acpi_write_speed_config(ctx, &config);
+ acpigen_pop_len(ctx);
+
+ return 0;
+}
+
+struct acpi_ops dw_i2c_acpi_ops = {
+ .fill_ssdt = dw_i2c_acpi_fill_ssdt,
+};
+
static const struct udevice_id designware_i2c_pci_ids[] = {
{ .compatible = "snps,designware-i2c-pci" },
{ .compatible = "intel,apl-i2c", .data = INTEL_APL },
.remove = designware_i2c_remove,
.flags = DM_FLAG_OS_PREPARE,
.ops = &designware_i2c_ops,
+ ACPI_OPS_PTR(&dw_i2c_acpi_ops)
};
static struct pci_device_id designware_pci_supported[] = {