mmc: sdhci.c: Add config option to use a fixed buffer for transfers

While implementing SDIO/MMC SPL booting for the Marvell Armada 38x, the
following problem occured. The SPL runs in internal SRAM which is
the L2 cache locked to memory. When the MMC buffers now are located
on the stack (or bss), the SDIO controller (SDHCI) can't write into
this L2 cache memory.

This patch introduces a method to use a fixed buffer that will be
used for all transfers by defining CONFIG_FIXED_SDHCI_ALIGNED_BUFFER.
This way, the board can use this buffer address located in SDRAM
for all transfers. This solves this SPL problem on the A38x and
should only be used in the SPL U-Boot version.

Tested for SPL booting on Marvell Armada 38x DB-88F6820-GP board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index f72536b2aa43f70f9aebca6431f29ff83aeac1cc..d89e3028417b0942cabffec34f58ea8c3e283917 100644 (file)
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -13,7 +13,11 @@
 #include <mmc.h>
 #include <sdhci.h>
 
+#if defined(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER)
+void *aligned_buffer = (void *)CONFIG_FIXED_SDHCI_ALIGNED_BUFFER;
+#else
 void *aligned_buffer;
+#endif
 
 static void sdhci_reset(struct sdhci_host *host, u8 mask)
 {
@@ -205,6 +209,17 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
                                memcpy(aligned_buffer, data->src, trans_bytes);
                }
 
+#if defined(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER)
+               /*
+                * Always use this bounce-buffer when
+                * CONFIG_FIXED_SDHCI_ALIGNED_BUFFER is defined
+                */
+               is_aligned = 0;
+               start_addr = (unsigned long)aligned_buffer;
+               if (data->flags != MMC_DATA_READ)
+                       memcpy(aligned_buffer, data->src, trans_bytes);
+#endif
+
                sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS);
                mode |= SDHCI_TRNS_DMA;
 #endif