]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
clk: sunxi: Use a single driver for all variants
authorSamuel Holland <samuel@sholland.org>
Mon, 9 May 2022 05:29:34 +0000 (00:29 -0500)
committerAndre Przywara <andre.przywara@arm.com>
Mon, 18 Jul 2022 08:37:49 +0000 (09:37 +0100)
Now that all of the variants use the same bind/probe functions and ops,
there is no need to have a separate driver for each variant. Since most
SoCs contain two variants (the main CCU and PRCM CCU), this saves a bit
of firmware size and RAM.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: add F1C100s support]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
17 files changed:
drivers/clk/sunxi/clk_a10.c
drivers/clk/sunxi/clk_a10s.c
drivers/clk/sunxi/clk_a23.c
drivers/clk/sunxi/clk_a31.c
drivers/clk/sunxi/clk_a31_r.c
drivers/clk/sunxi/clk_a64.c
drivers/clk/sunxi/clk_a80.c
drivers/clk/sunxi/clk_a83t.c
drivers/clk/sunxi/clk_f1c100s.c
drivers/clk/sunxi/clk_h3.c
drivers/clk/sunxi/clk_h6.c
drivers/clk/sunxi/clk_h616.c
drivers/clk/sunxi/clk_h6_r.c
drivers/clk/sunxi/clk_r40.c
drivers/clk/sunxi/clk_sunxi.c
drivers/clk/sunxi/clk_v3s.c
include/clk/sunxi.h

index 7bd9a379d7cb6ad6784e02677b2cc404eb371819..abd4e8b7389d8c26fbf74e59e943c670fc877110 100644 (file)
@@ -64,27 +64,9 @@ static struct ccu_reset a10_resets[] = {
        [RST_USB_PHY2]          = RESET(0x0cc, BIT(2)),
 };
 
-static const struct ccu_desc a10_ccu_desc = {
+const struct ccu_desc a10_ccu_desc = {
        .gates = a10_gates,
        .resets = a10_resets,
        .num_gates = ARRAY_SIZE(a10_gates),
        .num_resets = ARRAY_SIZE(a10_resets),
 };
-
-static const struct udevice_id a10_ccu_ids[] = {
-       { .compatible = "allwinner,sun4i-a10-ccu",
-         .data = (ulong)&a10_ccu_desc },
-       { .compatible = "allwinner,sun7i-a20-ccu",
-         .data = (ulong)&a10_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun4i_a10) = {
-       .name           = "sun4i_a10_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = a10_ccu_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index 4a83d6b21594892f3d50970ff4e20d5e13fc0ffb..e486cedd48d5402c65077dbdf8c3a16dc4bb9eed 100644 (file)
@@ -49,27 +49,9 @@ static struct ccu_reset a10s_resets[] = {
        [RST_USB_PHY1]          = RESET(0x0cc, BIT(1)),
 };
 
-static const struct ccu_desc a10s_ccu_desc = {
+const struct ccu_desc a10s_ccu_desc = {
        .gates = a10s_gates,
        .resets = a10s_resets,
        .num_gates = ARRAY_SIZE(a10s_gates),
        .num_resets = ARRAY_SIZE(a10s_resets),
 };
-
-static const struct udevice_id a10s_ccu_ids[] = {
-       { .compatible = "allwinner,sun5i-a10s-ccu",
-         .data = (ulong)&a10s_ccu_desc },
-       { .compatible = "allwinner,sun5i-a13-ccu",
-         .data = (ulong)&a10s_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun5i_a10s) = {
-       .name           = "sun5i_a10s_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = a10s_ccu_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index c7f516d7333dce515c391a0010d4b5584bc9851e..d94fecadd59a0d5fea83b426f2ecdfa85b1ad0ed 100644 (file)
@@ -68,27 +68,9 @@ static struct ccu_reset a23_resets[] = {
        [RST_BUS_UART4]         = RESET(0x2d8, BIT(20)),
 };
 
-static const struct ccu_desc a23_ccu_desc = {
+const struct ccu_desc a23_ccu_desc = {
        .gates = a23_gates,
        .resets = a23_resets,
        .num_gates = ARRAY_SIZE(a23_gates),
        .num_resets = ARRAY_SIZE(a23_resets),
 };
-
-static const struct udevice_id a23_clk_ids[] = {
-       { .compatible = "allwinner,sun8i-a23-ccu",
-         .data = (ulong)&a23_ccu_desc },
-       { .compatible = "allwinner,sun8i-a33-ccu",
-         .data = (ulong)&a23_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun8i_a23) = {
-       .name           = "sun8i_a23_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = a23_clk_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index aa113fa714c626bdff5a72461efceb44c8b46f95..360658912dd25a869a86fa4381c11360687bb45f 100644 (file)
@@ -89,25 +89,9 @@ static struct ccu_reset a31_resets[] = {
        [RST_APB2_UART5]        = RESET(0x2d8, BIT(21)),
 };
 
-static const struct ccu_desc a31_ccu_desc = {
+const struct ccu_desc a31_ccu_desc = {
        .gates = a31_gates,
        .resets = a31_resets,
        .num_gates = ARRAY_SIZE(a31_gates),
        .num_resets = ARRAY_SIZE(a31_resets),
 };
-
-static const struct udevice_id a31_clk_ids[] = {
-       { .compatible = "allwinner,sun6i-a31-ccu",
-         .data = (ulong)&a31_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun6i_a31) = {
-       .name           = "sun6i_a31_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = a31_clk_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index 04c238204dcb7d51b35f22957ba6efdc55cb6064..fa6887fa756f8c64c4ffcecd2c869ea14124fa37 100644 (file)
@@ -28,29 +28,9 @@ static struct ccu_reset a31_r_resets[] = {
        [RST_APB0_I2C]          = RESET(0x0b0, BIT(6)),
 };
 
-static const struct ccu_desc a31_r_ccu_desc = {
+const struct ccu_desc a31_r_ccu_desc = {
        .gates = a31_r_gates,
        .resets = a31_r_resets,
        .num_gates = ARRAY_SIZE(a31_r_gates),
        .num_resets = ARRAY_SIZE(a31_r_resets),
 };
-
-static const struct udevice_id a31_r_clk_ids[] = {
-       { .compatible = "allwinner,sun8i-a83t-r-ccu",
-         .data = (ulong)&a31_r_ccu_desc },
-       { .compatible = "allwinner,sun8i-h3-r-ccu",
-         .data = (ulong)&a31_r_ccu_desc },
-       { .compatible = "allwinner,sun50i-a64-r-ccu",
-         .data = (ulong)&a31_r_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun6i_a31_r) = {
-       .name           = "sun6i_a31_r_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = a31_r_clk_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index eac1151e966f8a174e27fffbe384576a6a6a7817..8c81b1ac453b3e5f1bf5e17e26b001e1aa6ffb74 100644 (file)
@@ -77,25 +77,9 @@ static const struct ccu_reset a64_resets[] = {
        [RST_BUS_UART4]         = RESET(0x2d8, BIT(20)),
 };
 
-static const struct ccu_desc a64_ccu_desc = {
+const struct ccu_desc a64_ccu_desc = {
        .gates = a64_gates,
        .resets = a64_resets,
        .num_gates = ARRAY_SIZE(a64_gates),
        .num_resets = ARRAY_SIZE(a64_resets),
 };
-
-static const struct udevice_id a64_ccu_ids[] = {
-       { .compatible = "allwinner,sun50i-a64-ccu",
-         .data = (ulong)&a64_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun50i_a64) = {
-       .name           = "sun50i_a64_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = a64_ccu_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index 426205d74822107cd5f8962a7d9abd842e2eeac0..3c9eb1431677e8c3c258bb58b0cd73617eaee018 100644 (file)
@@ -74,34 +74,16 @@ static const struct ccu_reset a80_mmc_resets[] = {
        [3]                     = GATE(0xc, BIT(18)),
 };
 
-static const struct ccu_desc a80_ccu_desc = {
+const struct ccu_desc a80_ccu_desc = {
        .gates = a80_gates,
        .resets = a80_resets,
        .num_gates = ARRAY_SIZE(a80_gates),
        .num_resets = ARRAY_SIZE(a80_resets),
 };
 
-static const struct ccu_desc a80_mmc_clk_desc = {
+const struct ccu_desc a80_mmc_clk_desc = {
        .gates = a80_mmc_gates,
        .resets = a80_mmc_resets,
        .num_gates = ARRAY_SIZE(a80_mmc_gates),
        .num_resets = ARRAY_SIZE(a80_mmc_resets),
 };
-
-static const struct udevice_id a80_ccu_ids[] = {
-       { .compatible = "allwinner,sun9i-a80-ccu",
-         .data = (ulong)&a80_ccu_desc },
-       { .compatible = "allwinner,sun9i-a80-mmc-config-clk",
-         .data = (ulong)&a80_mmc_clk_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun9i_a80) = {
-       .name           = "sun9i_a80_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = a80_ccu_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index 464e95c07da13addc605f0716bf90db7bd5affba..3562da61d14af3eb762ca405bf4866884c48b002 100644 (file)
@@ -72,25 +72,9 @@ static struct ccu_reset a83t_resets[] = {
        [RST_BUS_UART4]         = RESET(0x2d8, BIT(20)),
 };
 
-static const struct ccu_desc a83t_ccu_desc = {
+const struct ccu_desc a83t_ccu_desc = {
        .gates = a83t_gates,
        .resets = a83t_resets,
        .num_gates = ARRAY_SIZE(a83t_gates),
        .num_resets = ARRAY_SIZE(a83t_resets),
 };
-
-static const struct udevice_id a83t_clk_ids[] = {
-       { .compatible = "allwinner,sun8i-a83t-ccu",
-         .data = (ulong)&a83t_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun8i_a83t) = {
-       .name           = "sun8i_a83t_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = a83t_clk_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index acba8f2ebec7bb6c9d823aed4ed86a88893b7ccb..7b4c3ce517650e21f88a194daefcf93d79c40dc1 100644 (file)
@@ -47,25 +47,9 @@ static struct ccu_reset f1c100s_resets[] = {
        [RST_BUS_UART2]         = RESET(0x2d0, BIT(22)),
 };
 
-static const struct ccu_desc f1c100s_ccu_desc = {
+const struct ccu_desc f1c100s_ccu_desc = {
        .gates = f1c100s_gates,
        .resets = f1c100s_resets,
        .num_gates = ARRAY_SIZE(f1c100s_gates),
        .num_resets = ARRAY_SIZE(f1c100s_resets),
 };
-
-static const struct udevice_id f1c100s_clk_ids[] = {
-       { .compatible = "allwinner,suniv-f1c100s-ccu",
-         .data = (ulong)&f1c100s_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_suniv_f1c100s) = {
-       .name           = "suniv_f1c100s_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = f1c100s_clk_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index 474cf98f6445a10725ee84b5fa79ba7a164c67db..17ab3b5c278782a2d29ea1eb112f50df88b21c80 100644 (file)
@@ -90,27 +90,9 @@ static struct ccu_reset h3_resets[] = {
        [RST_BUS_UART3]         = RESET(0x2d8, BIT(19)),
 };
 
-static const struct ccu_desc h3_ccu_desc = {
+const struct ccu_desc h3_ccu_desc = {
        .gates = h3_gates,
        .resets = h3_resets,
        .num_gates = ARRAY_SIZE(h3_gates),
        .num_resets = ARRAY_SIZE(h3_resets),
 };
-
-static const struct udevice_id h3_ccu_ids[] = {
-       { .compatible = "allwinner,sun8i-h3-ccu",
-         .data = (ulong)&h3_ccu_desc },
-       { .compatible = "allwinner,sun50i-h5-ccu",
-         .data = (ulong)&h3_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun8i_h3) = {
-       .name           = "sun8i_h3_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = h3_ccu_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index 4e717afa26e0f08d0c18cf8bfed8c19f7da269d9..041bc5e80ed3f67d85d6ef359de6423e4e316d7c 100644 (file)
@@ -91,25 +91,9 @@ static struct ccu_reset h6_resets[] = {
        [RST_BUS_OTG]           = RESET(0xa8c, BIT(24)),
 };
 
-static const struct ccu_desc h6_ccu_desc = {
+const struct ccu_desc h6_ccu_desc = {
        .gates = h6_gates,
        .resets = h6_resets,
        .num_gates = ARRAY_SIZE(h6_gates),
        .num_resets = ARRAY_SIZE(h6_resets),
 };
-
-static const struct udevice_id h6_ccu_ids[] = {
-       { .compatible = "allwinner,sun50i-h6-ccu",
-         .data = (ulong)&h6_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun50i_h6) = {
-       .name           = "sun50i_h6_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = h6_ccu_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index 1ecccd7620c6c697dd0482243a7d69e0cfa8c30a..964636d72817b315c61ba9753c20c002ff0e9a45 100644 (file)
@@ -109,25 +109,9 @@ static struct ccu_reset h616_resets[] = {
        [RST_BUS_OTG]           = RESET(0xa8c, BIT(24)),
 };
 
-static const struct ccu_desc h616_ccu_desc = {
+const struct ccu_desc h616_ccu_desc = {
        .gates = h616_gates,
        .resets = h616_resets,
        .num_gates = ARRAY_SIZE(h616_gates),
        .num_resets = ARRAY_SIZE(h616_resets),
 };
-
-static const struct udevice_id h616_ccu_ids[] = {
-       { .compatible = "allwinner,sun50i-h616-ccu",
-         .data = (ulong)&h616_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun50i_h616) = {
-       .name           = "sun50i_h616_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = h616_ccu_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index bb67d58fa4708e6a4ee118f8020b1b88269b263f..ddcb3dae30a6116daefef2729662792e6543e96a 100644 (file)
@@ -34,27 +34,9 @@ static struct ccu_reset h6_r_resets[] = {
        [RST_R_APB1_W1]         = RESET(0x1ec, BIT(16)),
 };
 
-static const struct ccu_desc h6_r_ccu_desc = {
+const struct ccu_desc h6_r_ccu_desc = {
        .gates = h6_r_gates,
        .resets = h6_r_resets,
        .num_gates = ARRAY_SIZE(h6_r_gates),
        .num_resets = ARRAY_SIZE(h6_r_resets),
 };
-
-static const struct udevice_id h6_r_clk_ids[] = {
-       { .compatible = "allwinner,sun50i-h6-r-ccu",
-         .data = (ulong)&h6_r_ccu_desc },
-       { .compatible = "allwinner,sun50i-h616-r-ccu",
-         .data = (ulong)&h6_r_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun50i_h6_r) = {
-       .name           = "sun50i_h6_r_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = h6_r_clk_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index daab6ad33b45e32621361092d37e0c874e68e1f1..ef743d65b7f40e57af45e73303e3ba4bc755bc75 100644 (file)
@@ -99,25 +99,9 @@ static struct ccu_reset r40_resets[] = {
        [RST_BUS_UART7]         = RESET(0x2d8, BIT(23)),
 };
 
-static const struct ccu_desc r40_ccu_desc = {
+const struct ccu_desc r40_ccu_desc = {
        .gates = r40_gates,
        .resets = r40_resets,
        .num_gates = ARRAY_SIZE(r40_gates),
        .num_resets = ARRAY_SIZE(r40_resets),
 };
-
-static const struct udevice_id r40_clk_ids[] = {
-       { .compatible = "allwinner,sun8i-r40-ccu",
-         .data = (ulong)&r40_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun8i_r40) = {
-       .name           = "sun8i_r40_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = r40_clk_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index 23d81f68c5c0c5eaa929a2219ceac6987fb88b69..8503c79763752bd53e8a87204af118a75fcbd805 100644 (file)
@@ -67,12 +67,12 @@ struct clk_ops sunxi_clk_ops = {
        .disable = sunxi_clk_disable,
 };
 
-int sunxi_clk_bind(struct udevice *dev)
+static int sunxi_clk_bind(struct udevice *dev)
 {
        return sunxi_reset_bind(dev);
 }
 
-int sunxi_clk_probe(struct udevice *dev)
+static int sunxi_clk_probe(struct udevice *dev)
 {
        struct ccu_priv *priv = dev_get_priv(dev);
        struct clk_bulk clk_bulk;
@@ -97,3 +97,122 @@ int sunxi_clk_probe(struct udevice *dev)
 
        return 0;
 }
+
+extern const struct ccu_desc a10_ccu_desc;
+extern const struct ccu_desc a10s_ccu_desc;
+extern const struct ccu_desc a23_ccu_desc;
+extern const struct ccu_desc a31_ccu_desc;
+extern const struct ccu_desc a31_r_ccu_desc;
+extern const struct ccu_desc a64_ccu_desc;
+extern const struct ccu_desc a80_ccu_desc;
+extern const struct ccu_desc a80_mmc_clk_desc;
+extern const struct ccu_desc a83t_ccu_desc;
+extern const struct ccu_desc f1c100s_ccu_desc;
+extern const struct ccu_desc h3_ccu_desc;
+extern const struct ccu_desc h6_ccu_desc;
+extern const struct ccu_desc h616_ccu_desc;
+extern const struct ccu_desc h6_r_ccu_desc;
+extern const struct ccu_desc r40_ccu_desc;
+extern const struct ccu_desc v3s_ccu_desc;
+
+static const struct udevice_id sunxi_clk_ids[] = {
+#ifdef CONFIG_CLK_SUN4I_A10
+       { .compatible = "allwinner,sun4i-a10-ccu",
+         .data = (ulong)&a10_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN5I_A10S
+       { .compatible = "allwinner,sun5i-a10s-ccu",
+         .data = (ulong)&a10s_ccu_desc },
+       { .compatible = "allwinner,sun5i-a13-ccu",
+         .data = (ulong)&a10s_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN6I_A31
+       { .compatible = "allwinner,sun6i-a31-ccu",
+         .data = (ulong)&a31_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN4I_A10
+       { .compatible = "allwinner,sun7i-a20-ccu",
+         .data = (ulong)&a10_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN8I_A23
+       { .compatible = "allwinner,sun8i-a23-ccu",
+         .data = (ulong)&a23_ccu_desc },
+       { .compatible = "allwinner,sun8i-a33-ccu",
+         .data = (ulong)&a23_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN8I_A83T
+       { .compatible = "allwinner,sun8i-a83t-ccu",
+         .data = (ulong)&a83t_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN6I_A31_R
+       { .compatible = "allwinner,sun8i-a83t-r-ccu",
+         .data = (ulong)&a31_r_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN8I_H3
+       { .compatible = "allwinner,sun8i-h3-ccu",
+         .data = (ulong)&h3_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN6I_A31_R
+       { .compatible = "allwinner,sun8i-h3-r-ccu",
+         .data = (ulong)&a31_r_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN8I_R40
+       { .compatible = "allwinner,sun8i-r40-ccu",
+         .data = (ulong)&r40_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN8I_V3S
+       { .compatible = "allwinner,sun8i-v3-ccu",
+         .data = (ulong)&v3s_ccu_desc },
+       { .compatible = "allwinner,sun8i-v3s-ccu",
+         .data = (ulong)&v3s_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN9I_A80
+       { .compatible = "allwinner,sun9i-a80-ccu",
+         .data = (ulong)&a80_ccu_desc },
+       { .compatible = "allwinner,sun9i-a80-mmc-config-clk",
+         .data = (ulong)&a80_mmc_clk_desc },
+#endif
+#ifdef CONFIG_CLK_SUN50I_A64
+       { .compatible = "allwinner,sun50i-a64-ccu",
+         .data = (ulong)&a64_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN6I_A31_R
+       { .compatible = "allwinner,sun50i-a64-r-ccu",
+         .data = (ulong)&a31_r_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN8I_H3
+       { .compatible = "allwinner,sun50i-h5-ccu",
+         .data = (ulong)&h3_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN50I_H6
+       { .compatible = "allwinner,sun50i-h6-ccu",
+         .data = (ulong)&h6_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN50I_H6_R
+       { .compatible = "allwinner,sun50i-h6-r-ccu",
+         .data = (ulong)&h6_r_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN50I_H616
+       { .compatible = "allwinner,sun50i-h616-ccu",
+         .data = (ulong)&h616_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUN50I_H6_R
+       { .compatible = "allwinner,sun50i-h616-r-ccu",
+         .data = (ulong)&h6_r_ccu_desc },
+#endif
+#ifdef CONFIG_CLK_SUNIV_F1C100S
+       { .compatible = "allwinner,suniv-f1c100s-ccu",
+         .data = (ulong)&f1c100s_ccu_desc },
+#endif
+       { }
+};
+
+U_BOOT_DRIVER(sunxi_clk) = {
+       .name           = "sunxi_clk",
+       .id             = UCLASS_CLK,
+       .of_match       = sunxi_clk_ids,
+       .bind           = sunxi_clk_bind,
+       .probe          = sunxi_clk_probe,
+       .priv_auto      = sizeof(struct ccu_priv),
+       .ops            = &sunxi_clk_ops,
+};
index 5b5afa687153f1227aa28fad3ab0e0eec0b61f89..f2fd11eac2c8cb52ec1820f068d6a2cc5e27c100 100644 (file)
@@ -49,27 +49,9 @@ static struct ccu_reset v3s_resets[] = {
        [RST_BUS_UART2]         = RESET(0x2d8, BIT(18)),
 };
 
-static const struct ccu_desc v3s_ccu_desc = {
+const struct ccu_desc v3s_ccu_desc = {
        .gates = v3s_gates,
        .resets = v3s_resets,
        .num_gates = ARRAY_SIZE(v3s_gates),
        .num_resets = ARRAY_SIZE(v3s_resets),
 };
-
-static const struct udevice_id v3s_clk_ids[] = {
-       { .compatible = "allwinner,sun8i-v3s-ccu",
-         .data = (ulong)&v3s_ccu_desc },
-       { .compatible = "allwinner,sun8i-v3-ccu",
-         .data = (ulong)&v3s_ccu_desc },
-       { }
-};
-
-U_BOOT_DRIVER(clk_sun8i_v3s) = {
-       .name           = "sun8i_v3s_ccu",
-       .id             = UCLASS_CLK,
-       .of_match       = v3s_clk_ids,
-       .priv_auto      = sizeof(struct ccu_priv),
-       .ops            = &sunxi_clk_ops,
-       .probe          = sunxi_clk_probe,
-       .bind           = sunxi_clk_bind,
-};
index a70119304a707d1b6964d4b21516ca0f86cb4f28..65da03ee60ce27c12cb81e1fe922c0461ba65463 100644 (file)
@@ -85,18 +85,6 @@ struct ccu_priv {
        const struct ccu_desc *desc;
 };
 
-/**
- * sunxi_clk_bind - common sunxi clock bind
- * @dev:       clock device
- */
-int sunxi_clk_bind(struct udevice *dev);
-
-/**
- * sunxi_clk_probe - common sunxi clock probe
- * @dev:       clock device
- */
-int sunxi_clk_probe(struct udevice *dev);
-
 extern struct clk_ops sunxi_clk_ops;
 
 /**