]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
powerpc: P2020: Remove macro CONFIG_P2020
authorYork Sun <york.sun@nxp.com>
Fri, 18 Nov 2016 19:08:43 +0000 (11:08 -0800)
committerYork Sun <york.sun@nxp.com>
Thu, 24 Nov 2016 07:42:10 +0000 (23:42 -0800)
Replace CONFIG_P2020 with ARCH_P2020 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
arch/powerpc/cpu/mpc85xx/Kconfig
arch/powerpc/cpu/mpc85xx/Makefile
arch/powerpc/include/asm/config_mpc85xx.h
arch/powerpc/include/asm/fsl_law.h
arch/powerpc/include/asm/immap_85xx.h
board/xes/common/Makefile
board/xes/common/fsl_8xxx_clk.c
include/configs/p1_p2_rdb_pc.h
include/configs/xpedite550x.h
scripts/config_whitelist.txt

index 90777db96854f79680ef3c9baa0c00d21e9248a5..51192fe9dc3eb500a2897991d4f6b94bdfda0800 100644 (file)
@@ -162,6 +162,7 @@ config TARGET_P2020RDB
        bool "Support P2020RDB-PC"
        select SUPPORT_SPL
        select SUPPORT_TPL
+       select ARCH_P2020
 
 config TARGET_P1_TWR
        bool "Support p1_twr"
@@ -232,6 +233,7 @@ config TARGET_XPEDITE537X
 
 config TARGET_XPEDITE550X
        bool "Support xpedite550x"
+       select ARCH_P2020
 
 config TARGET_UCP1020
        bool "Support uCP1020"
@@ -306,6 +308,9 @@ config ARCH_P1024
 config ARCH_P1025
        bool
 
+config ARCH_P2020
+       bool
+
 source "board/freescale/b4860qds/Kconfig"
 source "board/freescale/bsc9131rdb/Kconfig"
 source "board/freescale/bsc9132qds/Kconfig"
index a3fba0374177f02ce0ff38d399acd485aedc6f82..acf57b7d7001cc1574ae89ae772dd333bd650bab 100644 (file)
@@ -81,7 +81,7 @@ obj-$(CONFIG_ARCH_P1023)      += p1023_serdes.o
 obj-$(CONFIG_ARCH_P1024)       += p1021_serdes.o
 obj-$(CONFIG_ARCH_P1025)       += p1021_serdes.o
 obj-$(CONFIG_P2010)    += p2020_serdes.o
-obj-$(CONFIG_P2020)    += p2020_serdes.o
+obj-$(CONFIG_ARCH_P2020)       += p2020_serdes.o
 obj-$(CONFIG_PPC_P2041) += p2041_serdes.o
 obj-$(CONFIG_PPC_P3041) += p3041_serdes.o
 obj-$(CONFIG_PPC_P4080) += p4080_serdes.o
index 6874b5403a2786cc3e20c53517296af0883a8f71..814a9fbce61f616a89f3bde0eaf559316fd4a277 100644 (file)
 #define CONFIG_SYS_FSL_ERRATUM_A004508
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 
-#elif defined(CONFIG_P2020)
+#elif defined(CONFIG_ARCH_P2020)
 #define CONFIG_MAX_CPUS                        2
 #define CONFIG_SYS_FSL_NUM_LAWS                12
 #define CONFIG_SYS_PPC_E500_DEBUG_TLB  2
index 4e5ea5f936444b46d24dd87a87eb5191c30a8d2e..eee78c8856dc5d7994129e8aa69d564a781216d3 100644 (file)
@@ -85,7 +85,7 @@ enum law_trgt_if {
 #if defined(CONFIG_ARCH_BSC9131) || defined(CONFIG_ARCH_BSC9132)
        LAW_TRGT_IF_OCN_DSP = 0x03,
 #else
-#if !defined(CONFIG_ARCH_MPC8572) && !defined(CONFIG_P2020)
+#if !defined(CONFIG_ARCH_MPC8572) && !defined(CONFIG_ARCH_P2020)
        LAW_TRGT_IF_PCIE_3 = 0x03,
 #endif
 #endif
@@ -121,7 +121,7 @@ enum law_trgt_if {
 #define LAW_TRGT_IF_PCIE_1     LAW_TRGT_IF_PCI
 #endif
 
-#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_P2020)
+#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_ARCH_P2020)
 #define LAW_TRGT_IF_PCIE_3     LAW_TRGT_IF_PCI
 #endif
 #endif /* CONFIG_FSL_CORENET */
index f8a6a7804928a3a67c9e2292f0013dc2daa51540..ba0faa80ea370e55a32a6e2da06d07582076f4f9 100644 (file)
@@ -2940,7 +2940,7 @@ struct ccsr_pman {
 #define CONFIG_SYS_MPC85xx_PCIX2_OFFSET                0x9000
 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET         0xa000
 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET         0x9000
-#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_P2020)
+#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_ARCH_P2020)
 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET         0x8000
 #else
 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET         0xb000
index 1b2ec5cadc2ddc78dea97d89a11fd7594567f56e..db1f029f96acfa25ee05be86108dc490fbf0a3f3 100644 (file)
@@ -8,7 +8,7 @@
 obj-$(CONFIG_FSL_PCI_INIT)     += fsl_8xxx_pci.o
 obj-$(CONFIG_ARCH_MPC8572)             += fsl_8xxx_clk.o
 obj-$(CONFIG_MPC86xx)          += fsl_8xxx_clk.o
-obj-$(CONFIG_P2020)            += fsl_8xxx_clk.o
+obj-$(CONFIG_ARCH_P2020)               += fsl_8xxx_clk.o
 obj-$(CONFIG_MPC85xx)          += fsl_8xxx_misc.o board.o
 obj-$(CONFIG_MPC86xx)          += fsl_8xxx_misc.o board.o
 obj-$(CONFIG_NAND_ACTL)        += actl_nand.o
index 2a604d448beceadb674e2386b3fde17ec31dfb60..e102b0cfc3866233d6c6c77e8ef6f210e93001ab 100644 (file)
@@ -22,7 +22,7 @@ unsigned long get_board_sys_clk(ulong dummy)
        if (in_be32(&gur->gpporcr) & 0x10000)
                return 66666666;
        else
-#ifdef CONFIG_P2020
+#ifdef CONFIG_ARCH_P2020
                return 100000000;
 #else
                return 50000000;
@@ -42,7 +42,7 @@ unsigned long get_board_ddr_clk(ulong dummy)
        if (ddr_ratio == 0x7)
                return get_board_sys_clk(dummy);
 
-#ifdef CONFIG_P2020
+#ifdef CONFIG_ARCH_P2020
        if (in_be32(&gur->gpporcr) & 0x20000)
                return 66666666;
        else
index 3320a7e933de71ea3ff76d0ecc005f7528088e86..77f3d8159374afb309191ff07c7404e3ce729b02 100644 (file)
 #if defined(CONFIG_TARGET_P2020RDB)
 #define CONFIG_BOARDNAME "P2020RDB-PC"
 #define CONFIG_NAND_FSL_ELBC
-#define CONFIG_P2020
 #define CONFIG_VSC7385_ENET
 #define __SW_BOOT_MASK         0x03
 #define __SW_BOOT_NOR          0xc8
index 973089b5a9474bd4169f657b68061cb5fa593104..f12f8fe1d0642027c6fb2076a5fcdc00b8030c5e 100644 (file)
@@ -16,7 +16,6 @@
  */
 #define CONFIG_BOOKE           1       /* BOOKE */
 #define CONFIG_E500            1       /* BOOKE e500 family */
-#define CONFIG_P2020           1
 #define CONFIG_XPEDITE550X     1
 #define CONFIG_SYS_BOARD_NAME  "XPedite5500"
 #define CONFIG_SYS_FORM_PMC_XMC        1
index e4dcd0b01b0d2b366066cb7c4d32ba0f12f2dd0c..cc4e05762eea13605002814808d00cc5a66e6fee 100644 (file)
@@ -3383,7 +3383,6 @@ CONFIG_OS2_ENV_ADDR
 CONFIG_OS_ENV_ADDR
 CONFIG_OTHBOOTARGS
 CONFIG_OVERWRITE_ETHADDR_ONCE
-CONFIG_P2020
 CONFIG_P2041RDB
 CONFIG_P3041DS
 CONFIG_P4080DS