ram: ast2600: Keep MPLL power on

According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>

diff --git a/drivers/ram/aspeed/sdram_ast2600.c b/drivers/ram/aspeed/sdram_ast2600.c
index 18767554123f8ad2ca76acf1da832dd9378d44c3..d463933363ee4494e2261db37a20f13b829726b3 100644 (file)
--- a/drivers/ram/aspeed/sdram_ast2600.c
+++ b/drivers/ram/aspeed/sdram_ast2600.c
@@ -1089,13 +1089,13 @@ static int ast2600_sdrammc_probe(struct udevice *dev)
        }
 
        reg = readl(&priv->scu->mpll);
-       reg &= ~(SCU_PLL_BYPASS | SCU_PLL_DIV_MASK |
+       reg &= ~(SCU_PLL_BYPASS | SCU_PLL_OFF | SCU_PLL_DIV_MASK |
                 SCU_PLL_DENUM_MASK | SCU_PLL_NUM_MASK);
-       reg |= (SCU_PLL_RST | SCU_PLL_OFF | SCU_MPLL_FREQ_CFG);
+       reg |= (SCU_PLL_RST | SCU_MPLL_FREQ_CFG);
        writel(reg, &priv->scu->mpll);
        writel(SCU_MPLL_EXT_CFG, &priv->scu->mpll_ext);
        udelay(100);
-       reg &= ~(SCU_PLL_RST | SCU_PLL_OFF);
+       reg &= ~SCU_PLL_RST;
        writel(reg, &priv->scu->mpll);
 
        while ((readl(&priv->scu->mpll_ext) & BIT(31)) == 0)