clk: sunxi: add PIO bus gate clocks

The introduction of the DM pinctrl driver made its probe function enable
all clocks enumerated in the DT. This includes the "CLK_BUS_PIO" (and
variations) gate clock. Also CLK_PLL_PERIPH0 is used by the R_CCU device.
So far we didn't describe those clocks in our clock driver.
As we enable them already in the SPL, the devices happen to work, but
the clock driver still complains about not finding those clocks:
=========
sunxi_set_gate: (CLK#58) unhandled
=========

Add the one-liners that are needed to announce the gate bit for those
clocks, to silence that message on the console.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>

diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index 90b929d3d3216f5581f624433363811105c156e0..db92848aafdec578efde2d3f35e0120893a955fd 100644 (file)
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -31,6 +31,8 @@ static struct ccu_clk_gate a10_gates[] = {
 
        [CLK_AHB_GMAC]          = GATE(0x064, BIT(17)),
 
+       [CLK_APB0_PIO]          = GATE(0x068, BIT(5)),
+
        [CLK_APB1_I2C0]         = GATE(0x06c, BIT(0)),
        [CLK_APB1_I2C1]         = GATE(0x06c, BIT(1)),
        [CLK_APB1_I2C2]         = GATE(0x06c, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c
index addf4f4d5cd5a9c2eab97ab5b1528b2316afd477..0c6564ef3b62498d57a27a3eb5f884fd9ab7460c 100644 (file)
--- a/drivers/clk/sunxi/clk_a10s.c
+++ b/drivers/clk/sunxi/clk_a10s.c
@@ -25,6 +25,8 @@ static struct ccu_clk_gate a10s_gates[] = {
        [CLK_AHB_SPI1]          = GATE(0x060, BIT(21)),
        [CLK_AHB_SPI2]          = GATE(0x060, BIT(22)),
 
+       [CLK_APB0_PIO]          = GATE(0x068, BIT(5)),
+
        [CLK_APB1_I2C0]         = GATE(0x06c, BIT(0)),
        [CLK_APB1_I2C1]         = GATE(0x06c, BIT(1)),
        [CLK_APB1_I2C2]         = GATE(0x06c, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c
index c45d2c352983718b4e8d0325e6b06c20acae0f0e..0280fb51e2db558f09a46f00642aa3f4a0dbe595 100644 (file)
--- a/drivers/clk/sunxi/clk_a23.c
+++ b/drivers/clk/sunxi/clk_a23.c
@@ -23,6 +23,8 @@ static struct ccu_clk_gate a23_gates[] = {
        [CLK_BUS_EHCI]          = GATE(0x060, BIT(26)),
        [CLK_BUS_OHCI]          = GATE(0x060, BIT(29)),
 
+       [CLK_BUS_PIO]           = GATE(0x068, BIT(5)),
+
        [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
        [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
        [CLK_BUS_I2C2]          = GATE(0x06c, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c
index 251fc3b705ecdf1596bb4ca3c4223ddad4890854..26d25f3240803e0fcc044adc7a6d8f9fc12f1666 100644 (file)
--- a/drivers/clk/sunxi/clk_a31.c
+++ b/drivers/clk/sunxi/clk_a31.c
@@ -30,6 +30,8 @@ static struct ccu_clk_gate a31_gates[] = {
        [CLK_AHB1_OHCI1]        = GATE(0x060, BIT(30)),
        [CLK_AHB1_OHCI2]        = GATE(0x060, BIT(31)),
 
+       [CLK_APB1_PIO]          = GATE(0x068, BIT(5)),
+
        [CLK_APB2_I2C0]         = GATE(0x06c, BIT(0)),
        [CLK_APB2_I2C1]         = GATE(0x06c, BIT(1)),
        [CLK_APB2_I2C2]         = GATE(0x06c, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index 1004a7950333b3a09a4852718193eeaa2e647add..cbb9168edb9ca0c24daa0841ad28a3507121d58f 100644 (file)
--- a/drivers/clk/sunxi/clk_a64.c
+++ b/drivers/clk/sunxi/clk_a64.c
@@ -14,6 +14,8 @@
 #include <linux/bitops.h>
 
 static const struct ccu_clk_gate a64_gates[] = {
+       [CLK_PLL_PERIPH0]       = GATE(0x028, BIT(31)),
+
        [CLK_BUS_MMC0]          = GATE(0x060, BIT(8)),
        [CLK_BUS_MMC1]          = GATE(0x060, BIT(9)),
        [CLK_BUS_MMC2]          = GATE(0x060, BIT(10)),
@@ -26,6 +28,8 @@ static const struct ccu_clk_gate a64_gates[] = {
        [CLK_BUS_OHCI0]         = GATE(0x060, BIT(28)),
        [CLK_BUS_OHCI1]         = GATE(0x060, BIT(29)),
 
+       [CLK_BUS_PIO]           = GATE(0x068, BIT(5)),
+
        [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
        [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
        [CLK_BUS_I2C2]          = GATE(0x06c, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c
index 8a0834d83a3206c2ab03c517a4e50b718238d93e..1ee1f99a8f49defc6209be1d73fae9cd080a79a8 100644 (file)
--- a/drivers/clk/sunxi/clk_a80.c
+++ b/drivers/clk/sunxi/clk_a80.c
@@ -25,6 +25,8 @@ static const struct ccu_clk_gate a80_gates[] = {
        [CLK_BUS_SPI2]          = GATE(0x580, BIT(22)),
        [CLK_BUS_SPI3]          = GATE(0x580, BIT(23)),
 
+       [CLK_BUS_PIO]           = GATE(0x590, BIT(5)),
+
        [CLK_BUS_I2C0]          = GATE(0x594, BIT(0)),
        [CLK_BUS_I2C1]          = GATE(0x594, BIT(1)),
        [CLK_BUS_I2C2]          = GATE(0x594, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c
index 8c6043f51e2687585b6e932d1e599e7d2fd69b67..4b57434cfaadac9067b5f8582fbc781567d48a22 100644 (file)
--- a/drivers/clk/sunxi/clk_a83t.c
+++ b/drivers/clk/sunxi/clk_a83t.c
@@ -25,6 +25,8 @@ static struct ccu_clk_gate a83t_gates[] = {
        [CLK_BUS_EHCI1]         = GATE(0x060, BIT(27)),
        [CLK_BUS_OHCI0]         = GATE(0x060, BIT(29)),
 
+       [CLK_BUS_PIO]           = GATE(0x068, BIT(5)),
+
        [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
        [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
        [CLK_BUS_I2C2]          = GATE(0x06c, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c
index 59afba53eef916da244d160cac4d84f939e65fca..08a830bd1889c039d366c36b76d059cd74b4c357 100644 (file)
--- a/drivers/clk/sunxi/clk_h3.c
+++ b/drivers/clk/sunxi/clk_h3.c
@@ -14,6 +14,8 @@
 #include <linux/bitops.h>
 
 static struct ccu_clk_gate h3_gates[] = {
+       [CLK_PLL_PERIPH0]       = GATE(0x028, BIT(31)),
+
        [CLK_BUS_MMC0]          = GATE(0x060, BIT(8)),
        [CLK_BUS_MMC1]          = GATE(0x060, BIT(9)),
        [CLK_BUS_MMC2]          = GATE(0x060, BIT(10)),
@@ -30,6 +32,8 @@ static struct ccu_clk_gate h3_gates[] = {
        [CLK_BUS_OHCI2]         = GATE(0x060, BIT(30)),
        [CLK_BUS_OHCI3]         = GATE(0x060, BIT(31)),
 
+       [CLK_BUS_PIO]           = GATE(0x068, BIT(5)),
+
        [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
        [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
        [CLK_BUS_I2C2]          = GATE(0x06c, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index 4a53788352c5b6d0f873dfd5297f8255426a2a8c..f4e26cbcd45c8cdc8d5f7bf245832ef602aedd8d 100644 (file)
--- a/drivers/clk/sunxi/clk_h6.c
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -14,6 +14,8 @@
 #include <linux/bitops.h>
 
 static struct ccu_clk_gate h6_gates[] = {
+       [CLK_PLL_PERIPH0]       = GATE(0x020, BIT(31)),
+
        [CLK_BUS_MMC0]          = GATE(0x84c, BIT(0)),
        [CLK_BUS_MMC1]          = GATE(0x84c, BIT(1)),
        [CLK_BUS_MMC2]          = GATE(0x84c, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_h616.c b/drivers/clk/sunxi/clk_h616.c
index af97d3bb9f742f303b81de6201538540a5400e37..65ab44643da3d6e3ae9ddeaa08d7196563892019 100644 (file)
--- a/drivers/clk/sunxi/clk_h616.c
+++ b/drivers/clk/sunxi/clk_h616.c
@@ -13,6 +13,8 @@
 #include <linux/bitops.h>
 
 static struct ccu_clk_gate h616_gates[] = {
+       [CLK_PLL_PERIPH0]       = GATE(0x020, BIT(31) | BIT(27)),
+
        [CLK_BUS_MMC0]          = GATE(0x84c, BIT(0)),
        [CLK_BUS_MMC1]          = GATE(0x84c, BIT(1)),
        [CLK_BUS_MMC2]          = GATE(0x84c, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c
index 4d5b69a976516288245227a54eb7c04066493029..45633a2a52494f4fe0b4363b1a3bb8a8406cac48 100644 (file)
--- a/drivers/clk/sunxi/clk_r40.c
+++ b/drivers/clk/sunxi/clk_r40.c
@@ -32,6 +32,8 @@ static struct ccu_clk_gate r40_gates[] = {
 
        [CLK_BUS_GMAC]          = GATE(0x064, BIT(17)),
 
+       [CLK_BUS_PIO]           = GATE(0x068, BIT(5)),
+
        [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
        [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
        [CLK_BUS_I2C2]          = GATE(0x06c, BIT(2)),

diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index cce5c658ca014d752317e18ed3f2ee3ba0c25158..67d215cbba8a48ddcab38f2ca9fd15c833cd11b1 100644 (file)
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/drivers/clk/sunxi/clk_v3s.c
@@ -20,6 +20,8 @@ static struct ccu_clk_gate v3s_gates[] = {
        [CLK_BUS_SPI0]          = GATE(0x060, BIT(20)),
        [CLK_BUS_OTG]           = GATE(0x060, BIT(24)),
 
+       [CLK_BUS_PIO]           = GATE(0x068, BIT(5)),
+
        [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
        [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
        [CLK_BUS_UART0]         = GATE(0x06c, BIT(16)),