board: ax25-ae350: Support cfi flash

Add smc_init() to get register base from dts and
deal with atfsmc020 controler initialzation job.

Write protect is enabled by default. So WP shall
be disabled when startup, then cfi flash can be
detected and erasing and writing can be executed.

Adp-ae3xx and adp-ag101p both do smc initilize job
in lowlevel_init.S and get register base fron
CONFIG_FTSMC020_BASE. They also can be moved those
codes to board stage. Remind them as todo jobs.
After that CONFIG_FTSMC020_BASE can be removed.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>

diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c
index bc625f10dcd513d413be61df580ee6af96c816f4..fd5aaa1579a7599d10b5ca6d300d11eca739366b 100644 (file)
--- a/board/AndesTech/ax25-ae350/ax25-ae350.c
+++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
@@ -10,6 +10,8 @@
 #include <netdev.h>
 #endif
 #include <linux/io.h>
+#include <faraday/ftsmc020.h>
+#include <fdtdec.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -72,3 +74,35 @@ void *board_fdt_blob_setup(void)
 
        return (void *)CONFIG_SYS_FDT_BASE;
 }
+
+int smc_init(void)
+{
+       int node = -1;
+       const char *compat = "andestech,atfsmc020";
+       void *blob = (void *)gd->fdt_blob;
+       fdt_addr_t addr;
+       struct ftsmc020_bank *regs;
+
+       node = fdt_node_offset_by_compatible(blob, -1, compat);
+       if (node < 0)
+               return -FDT_ERR_NOTFOUND;
+
+       addr = fdtdec_get_addr(blob, node, "reg");
+
+       if (addr == FDT_ADDR_T_NONE)
+               return -EINVAL;
+
+       regs = (struct ftsmc020_bank *)addr;
+       regs->cr &= ~FTSMC020_BANK_WPROT;
+
+       return 0;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+       smc_init();
+
+       return 0;
+}
+#endif