]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
pinctrl: renesas: Enable R8A774A1 PFC tables
authorAdam Ford <aford173@gmail.com>
Tue, 30 Jun 2020 14:30:09 +0000 (09:30 -0500)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Sat, 25 Jul 2020 09:16:39 +0000 (11:16 +0200)
The PFC tables for the R8A774A1 are already available, but they
not enabled.

This patch adds the Kconfig option and builds the corresponding file
when PINCTRL_PFC_R8A774A1 is enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
drivers/pinctrl/renesas/Kconfig
drivers/pinctrl/renesas/Makefile
drivers/pinctrl/renesas/pfc.c
drivers/pinctrl/renesas/sh_pfc.h

index 4d3d68d307305c0c43c13039aa75e3b953e5aa6d..8327bcabd661b5e51199431c43cbae94ce6534a7 100644 (file)
@@ -77,6 +77,16 @@ config PINCTRL_PFC_R8A7796
          the GPIO definitions and pin control functions for each available
          multiplex function.
 
+config PINCTRL_PFC_R8A774A1
+        bool "Renesas RCar Gen3 R8A774A1 pin control driver"
+        depends on PINCTRL_PFC
+        help
+          Support pin multiplexing control on Renesas RZG2M R8A774A1 SoCs.
+
+          The driver is controlled by a device tree node which contains both
+          the GPIO definitions and pin control functions for each available
+          multiplex function.
+
 config PINCTRL_PFC_R8A77965
        bool "Renesas RCar Gen3 R8A77965 pin control driver"
        depends on PINCTRL_PFC
index a92f787a8909e183f569b31c754597a2b584f491..a4eb912d5485bd9bf5423c82c2e62430b2bcfcab 100644 (file)
@@ -1,4 +1,5 @@
 obj-$(CONFIG_PINCTRL_PFC) += pfc.o
+obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7792) += pfc-r8a7792.o
index 1179afd2e7b266cbfca0fc36ced03ddaf21bac53..7ba78495930db5ef663a31cfbfc3f7d81ccb5b06 100644 (file)
@@ -32,6 +32,7 @@ enum sh_pfc_model {
        SH_PFC_R8A7794,
        SH_PFC_R8A7795,
        SH_PFC_R8A7796,
+       SH_PFC_R8A774A1,
        SH_PFC_R8A77965,
        SH_PFC_R8A77970,
        SH_PFC_R8A77980,
@@ -853,6 +854,10 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev)
        if (model == SH_PFC_R8A7796)
                priv->pfc.info = &r8a7796_pinmux_info;
 #endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774A1
+       if (model == SH_PFC_R8A774A1)
+               priv->pfc.info = &r8a774a1_pinmux_info;
+#endif
 #ifdef CONFIG_PINCTRL_PFC_R8A77965
        if (model == SH_PFC_R8A77965)
                priv->pfc.info = &r8a77965_pinmux_info;
@@ -924,6 +929,12 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = {
                .data = SH_PFC_R8A7796,
        },
 #endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774A1
+       {
+               .compatible = "renesas,pfc-r8a774a1",
+               .data = SH_PFC_R8A774A1,
+       },
+#endif
 #ifdef CONFIG_PINCTRL_PFC_R8A77965
        {
                .compatible = "renesas,pfc-r8a77965",
index db3d5133582c927be492e61b6e97c6864f8473bb..81c017994825e865421138cfd7e34ab7904d26fe 100644 (file)
@@ -293,6 +293,7 @@ const struct pinmux_bias_reg *
 sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
                       unsigned int *bit);
 
+extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7791_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7792_pinmux_info;