soc: xilinx: versal: Add soc_xilinx_versal driver

soc_xilinx_versal driver allows identification of family & revision
of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL.
Probe this driver using platdata U_BOOT_DEVICE structure which is
defined at mach-versal/cpu.c.
Add this config to xilinx_versal_virt_defconfig &
xilinx_versal_mini_ospi_defconfig file to select this driver.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index af5a1fedf1d3accde49a3054dba7210fedae6949..4cf0c33c5d5868b3e821df81ddf918a9e21f9806 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -546,6 +546,7 @@ S:  Maintained
 T:     git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
 F:     arch/arm/mach-versal/
 F:     drivers/net/xilinx_axi_mrmac.*
+F:     drivers/soc/soc_xilinx_versal.c
 F:     drivers/watchdog/xilinx_wwdt.c
 N:     (?<!uni)versal
 

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3e8a31f8ad56ca771aaf4a2945cd63751617d590..0cc4326f2564e1f631fd09653294d0a8000496e6 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1055,6 +1055,7 @@ config ARCH_VERSAL
        select DM_SERIAL
        select GPIO_EXTRA_HEADER
        select OF_CONTROL
+       select SOC_DEVICE
        imply BOARD_LATE_INIT
        imply ENV_VARS_UBOOT_RUNTIME_CONFIG
 

diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index a35aac2c02c20f79ea9ccf28d133be18dd2a1d50..9dc308bbc3d931e3a6ef218a64e714fbdec40fb1 100644 (file)
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -13,6 +13,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/cache.h>
+#include <dm/platdata.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -120,3 +121,7 @@ int arm_reserve_mmu(void)
        return 0;
 }
 #endif
+
+U_BOOT_DRVINFO(soc_xilinx_versal) = {
+       .name = "soc_xilinx_versal",
+};

diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h
index 9af5afd3f3f43818f9d7e540a733dc2099acd84f..7b728ac1101813f4da1dcfe012ab17faa4378152 100644 (file)
--- a/arch/arm/mach-versal/include/mach/hardware.h
+++ b/arch/arm/mach-versal/include/mach/hardware.h
@@ -65,6 +65,10 @@ struct crp_regs {
 
 #define crp_base ((struct crp_regs *)VERSAL_CRP_BASEADDR)
 
+#define VERSAL_PS_PMC_VERSION  0xF11A0004
+#define VERSAL_PS_VER_MASK     GENMASK(7, 0)
+#define VERSAL_PS_VER_SHIFT    12
+
 /* Bootmode setting values */
 #define BOOT_MODES_MASK        0x0000000F
 #define QSPI_MODE_24BIT        0x00000001

diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index c894d32a9259a7040679a97af18aee4b268a57d9..15fa5b9900c99dd7802950d0df7109d802a27c1b 100644 (file)
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -96,6 +96,7 @@ CONFIG_ZYNQ_GEM=y
 CONFIG_ARM_DCC=y
 CONFIG_PL01X_SERIAL=y
 CONFIG_XILINX_UARTLITE=y
+CONFIG_SOC_XILINX_VERSAL=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_ZYNQ_SPI=y

diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 17fb4c4d65e53159cbdfe288e82dae3ec6b94c83..292dc41b6fa26c0aaa42ef2f3b652ef4651a01f2 100644 (file)
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -24,6 +24,14 @@ config SOC_XILINX_ZYNQMP
          This allows other drivers to verify the SoC familiy & revision
          using matching SoC attributes.
 
+config SOC_XILINX_VERSAL
+       bool "Enable SoC Device ID driver for Xilinx Versal"
+       depends on SOC_DEVICE && ARCH_VERSAL
+       help
+         Enable this option to select SoC device id driver for Xilinx Versal.
+         This allows other drivers to verify the SoC familiy & revision using
+         matching SoC attributes.
+
 source "drivers/soc/ti/Kconfig"
 
 endmenu

diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 9b26573c71c860b506eb32afdbae57453f3336ac..031fa7612f485a64245bb480389f1b7d32cd914c 100644 (file)
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_SOC_DEVICE) += soc-uclass.o
 obj-$(CONFIG_SOC_DEVICE_TI_K3) += soc_ti_k3.o
 obj-$(CONFIG_SANDBOX) += soc_sandbox.o
 obj-$(CONFIG_SOC_XILINX_ZYNQMP) += soc_xilinx_zynqmp.o
+obj-$(CONFIG_SOC_XILINX_VERSAL) += soc_xilinx_versal.o

diff --git a/drivers/soc/soc_xilinx_versal.c b/drivers/soc/soc_xilinx_versal.c
new file mode 100644 (file)
index 0000000..f8bcd9a
--- /dev/null
+++ b/drivers/soc/soc_xilinx_versal.c
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal SOC driver
+ *
+ * Copyright (C) 2021 Xilinx, Inc.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <soc.h>
+#include <zynqmp_firmware.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+/*
+ * v1 -> 0x10 - ES1
+ * v2 -> 0x20 - Production
+ */
+static const char versal_family[] = "Versal";
+
+struct soc_xilinx_versal_priv {
+       const char *family;
+       char revision;
+};
+
+static int soc_xilinx_versal_get_family(struct udevice *dev, char *buf, int size)
+{
+       struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
+
+       return snprintf(buf, size, "%s", priv->family);
+}
+
+static int soc_xilinx_versal_get_revision(struct udevice *dev, char *buf, int size)
+{
+       struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
+
+       return snprintf(buf, size, "v%d", priv->revision);
+}
+
+static const struct soc_ops soc_xilinx_versal_ops = {
+       .get_family = soc_xilinx_versal_get_family,
+       .get_revision = soc_xilinx_versal_get_revision,
+};
+
+static int soc_xilinx_versal_probe(struct udevice *dev)
+{
+       struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
+       u32 ret_payload[4];
+       int ret;
+
+       priv->family = versal_family;
+
+       if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) {
+               ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0,
+                                       ret_payload);
+               if (ret)
+                       return ret;
+       } else {
+               ret_payload[2] = readl(VERSAL_PS_PMC_VERSION);
+               if (!ret_payload[2])
+                       return -EINVAL;
+       }
+
+       priv->revision = ret_payload[2] >> VERSAL_PS_VER_SHIFT;
+
+       return 0;
+}
+
+U_BOOT_DRIVER(soc_xilinx_versal) = {
+       .name           = "soc_xilinx_versal",
+       .id             = UCLASS_SOC,
+       .ops            = &soc_xilinx_versal_ops,
+       .probe          = soc_xilinx_versal_probe,
+       .priv_auto      = sizeof(struct soc_xilinx_versal_priv),
+       .flags          = DM_FLAG_PRE_RELOC,
+};