riscv: Update SiFive device tree for new CLINT driver

We currently do this in a u-boot specific dts, but hopefully we can get
these bindings added in Linux in the future.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>

diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi b/arch/riscv/dts/fu540-c000-u-boot.dtsi
index 5302677ee4bb65956478e2123d98f3a05660cc67..a06e1b11c639deea364fd580b85d0e5ebaafcbbb 100644 (file)
--- a/arch/riscv/dts/fu540-c000-u-boot.dtsi
+++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi
@@ -55,9 +55,13 @@
                        reg = <0x0 0x10070000 0x0 0x1000>;
                        fuse-count = <0x1000>;
                };
-               clint@2000000 {
+               clint: clint@2000000 {
                        compatible = "riscv,clint0";
-                       interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7 &cpu1_intc 3 &cpu1_intc 7 &cpu2_intc 3 &cpu2_intc 7 &cpu3_intc 3 &cpu3_intc 7 &cpu4_intc 3 &cpu4_intc 7>;
+                       interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
+                                              &cpu1_intc 3 &cpu1_intc 7
+                                              &cpu2_intc 3 &cpu2_intc 7
+                                              &cpu3_intc 3 &cpu3_intc 7
+                                              &cpu4_intc 3 &cpu4_intc 7>;
                        reg = <0x0 0x2000000 0x0 0xc0000>;
                        u-boot,dm-spl;
                };

diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
index 5d0c928b2964c70eee504b772f49ee0e09cb9d3d..1996149c95a8fb69d5b4194872d8d1b753ed65c4 100644 (file)
--- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
+++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
@@ -34,6 +34,10 @@
 
 };
 
+&clint {
+       clocks = <&rtcclk>;
+};
+
 &qspi0 {
        u-boot,dm-spl;