#include "board.h"
#include <power/pmic.h>
#include <power/tps65218.h>
+#include <power/tps62362.h>
#include <miiphy.h>
#include <cpsw.h>
const struct dpll_params gp_evm_dpll_ddr = {
50, 2, 1, -1, 2, -1, -1};
+static const struct dpll_params idk_dpll_ddr = {
+ 400, 23, 1, -1, 2, -1, -1
+};
+
const struct ctrl_ioregs ioregs_lpddr2 = {
.cm0ioctl = LPDDR2_ADDRCTRL_IOCTRL_VALUE,
.cm1ioctl = LPDDR2_ADDRCTRL_WD0_IOCTRL_VALUE,
.emif_cos_config = 0x000FFFFF
};
+static const struct emif_regs ddr3_idk_emif_regs_400Mhz = {
+ .sdram_config = 0x61a11b32,
+ .sdram_config2 = 0x00000000,
+ .ref_ctrl = 0x00000c30,
+ .sdram_tim1 = 0xeaaad4db,
+ .sdram_tim2 = 0x266b7fda,
+ .sdram_tim3 = 0x107f8678,
+ .read_idle_ctrl = 0x00050000,
+ .zq_config = 0x50074be4,
+ .temp_alert_config = 0x00000000,
+ .emif_ddr_phy_ctlr_1 = 0x00008009,
+ .emif_ddr_ext_phy_ctrl_1 = 0x08020080,
+ .emif_ddr_ext_phy_ctrl_2 = 0x00000040,
+ .emif_ddr_ext_phy_ctrl_3 = 0x0000003e,
+ .emif_ddr_ext_phy_ctrl_4 = 0x00000051,
+ .emif_ddr_ext_phy_ctrl_5 = 0x00000051,
+ .emif_rd_wr_lvl_rmp_win = 0x00000000,
+ .emif_rd_wr_lvl_rmp_ctl = 0x00000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000405,
+ .emif_prio_class_serv_map = 0x00000000,
+ .emif_connect_id_serv_1_map = 0x00000000,
+ .emif_connect_id_serv_2_map = 0x00000000,
+ .emif_cos_config = 0x00ffffff
+};
+
/*
* get_sys_clk_index : returns the index of the sys_clk read from
* ctrl status register. This value is either
return &epos_evm_dpll_ddr[ind];
else if (board_is_gpevm() || board_is_sk())
return &gp_evm_dpll_ddr;
+ else if (board_is_idk())
+ return &idk_dpll_ddr;
printf(" Board '%s' not supported\n", am43xx_board_name);
return NULL;
return &dpll_per[ind];
}
-void scale_vcores(void)
+void scale_vcores_generic(u32 m)
{
- const struct dpll_params *mpu_params;
int mpu_vdd;
- struct am43xx_board_id header;
-
- enable_i2c0_pin_mux();
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
- if (read_eeprom(&header) < 0)
- puts("Could not get board ID.\n");
-
- /* Get the frequency */
- mpu_params = get_dpll_mpu_params();
if (i2c_probe(TPS65218_CHIP_PM))
return;
- switch (mpu_params->m) {
+ switch (m) {
case 1000:
mpu_vdd = TPS65218_DCDC_VOLT_SEL_1330MV;
break;
/* Set DCDC1 (CORE) voltage to 1.1V */
if (tps65218_voltage_update(TPS65218_DCDC1,
TPS65218_DCDC_VOLT_SEL_1100MV)) {
- puts("tps65218_voltage_update failure\n");
+ printf("%s failure\n", __func__);
return;
}
/* Set DCDC2 (MPU) voltage */
if (tps65218_voltage_update(TPS65218_DCDC2, mpu_vdd)) {
- puts("tps65218_voltage_update failure\n");
+ printf("%s failure\n", __func__);
return;
}
}
+void scale_vcores_idk(u32 m)
+{
+ int mpu_vdd;
+
+ if (i2c_probe(TPS62362_I2C_ADDR))
+ return;
+
+ switch (m) {
+ case 1000:
+ mpu_vdd = TPS62362_DCDC_VOLT_SEL_1330MV;
+ break;
+ case 800:
+ mpu_vdd = TPS62362_DCDC_VOLT_SEL_1260MV;
+ break;
+ case 720:
+ mpu_vdd = TPS62362_DCDC_VOLT_SEL_1200MV;
+ break;
+ case 600:
+ mpu_vdd = TPS62362_DCDC_VOLT_SEL_1100MV;
+ break;
+ case 300:
+ mpu_vdd = TPS62362_DCDC_VOLT_SEL_1330MV;
+ break;
+ default:
+ puts("Unknown MPU clock, not scaling\n");
+ return;
+ }
+
+ /* Set VDD_MPU voltage */
+ if (tps62362_voltage_update(TPS62362_SET3, mpu_vdd)) {
+ printf("%s failure\n", __func__);
+ return;
+ }
+}
+
+void scale_vcores(void)
+{
+ const struct dpll_params *mpu_params;
+ struct am43xx_board_id header;
+
+ enable_i2c0_pin_mux();
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+ if (read_eeprom(&header) < 0)
+ puts("Could not get board ID.\n");
+
+ /* Get the frequency */
+ mpu_params = get_dpll_mpu_params();
+
+ if (board_is_idk())
+ scale_vcores_idk(mpu_params->m);
+ else
+ scale_vcores_generic(mpu_params->m);
+}
+
void set_uart_mux_conf(void)
{
enable_uart0_pin_mux();
} else if (board_is_sk()) {
config_ddr(400, &ioregs_ddr3, NULL, NULL,
&ddr3_sk_emif_regs_400Mhz, 0);
+ } else if (board_is_idk()) {
+ config_ddr(400, &ioregs_ddr3, NULL, NULL,
+ &ddr3_idk_emif_regs_400Mhz, 0);
}
}
#endif
{
struct pmic *p;
- power_tps65218_init(I2C_PMIC);
- p = pmic_get("TPS65218_PMIC");
- if (p && !pmic_probe(p))
- puts("PMIC: TPS65218\n");
+ if (board_is_idk()) {
+ power_tps62362_init(I2C_PMIC);
+ p = pmic_get("TPS62362");
+ if (p && !pmic_probe(p))
+ puts("PMIC: TPS62362\n");
+ } else {
+ power_tps65218_init(I2C_PMIC);
+ p = pmic_get("TPS65218_PMIC");
+ if (p && !pmic_probe(p))
+ puts("PMIC: TPS65218\n");
+ }
return 0;
}
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
cpsw_slaves[0].phy_addr = 4;
cpsw_slaves[1].phy_addr = 5;
+ } else if (board_is_idk()) {
+ writel(RGMII_MODE_ENABLE, &cdev->miisel);
+ cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
+ cpsw_slaves[0].phy_addr = 0;
} else {
writel(RGMII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;