]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
Convert CONFIG_SYS_BOOK3E_HV to Kconfig
authorTom Rini <trini@konsulko.com>
Sat, 25 Jun 2022 15:02:43 +0000 (11:02 -0400)
committerTom Rini <trini@konsulko.com>
Thu, 7 Jul 2022 13:29:56 +0000 (09:29 -0400)
This converts the following to Kconfig:
   CONFIG_SYS_BOOK3E_HV

Signed-off-by: Tom Rini <trini@konsulko.com>
49 files changed:
arch/powerpc/cpu/mpc85xx/Kconfig
configs/P2041RDB_NAND_defconfig
configs/P2041RDB_SDCARD_defconfig
configs/P2041RDB_SPIFLASH_defconfig
configs/P2041RDB_defconfig
configs/P3041DS_NAND_defconfig
configs/P3041DS_SDCARD_defconfig
configs/P3041DS_SPIFLASH_defconfig
configs/P3041DS_defconfig
configs/P4080DS_SDCARD_defconfig
configs/P4080DS_SPIFLASH_defconfig
configs/P4080DS_defconfig
configs/P5040DS_NAND_defconfig
configs/P5040DS_SDCARD_defconfig
configs/P5040DS_SPIFLASH_defconfig
configs/P5040DS_defconfig
configs/T1024RDB_NAND_defconfig
configs/T1024RDB_SDCARD_defconfig
configs/T1024RDB_SPIFLASH_defconfig
configs/T1024RDB_defconfig
configs/T1042D4RDB_NAND_defconfig
configs/T1042D4RDB_SDCARD_defconfig
configs/T1042D4RDB_SPIFLASH_defconfig
configs/T1042D4RDB_defconfig
configs/T2080QDS_NAND_defconfig
configs/T2080QDS_SDCARD_defconfig
configs/T2080QDS_SECURE_BOOT_defconfig
configs/T2080QDS_SPIFLASH_defconfig
configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
configs/T2080QDS_defconfig
configs/T2080RDB_NAND_defconfig
configs/T2080RDB_SDCARD_defconfig
configs/T2080RDB_SPIFLASH_defconfig
configs/T2080RDB_defconfig
configs/T2080RDB_revD_NAND_defconfig
configs/T2080RDB_revD_SDCARD_defconfig
configs/T2080RDB_revD_SPIFLASH_defconfig
configs/T2080RDB_revD_defconfig
configs/T4240RDB_SDCARD_defconfig
configs/T4240RDB_defconfig
configs/kmcent2_defconfig
include/configs/P2041RDB.h
include/configs/T102xRDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/corenet_ds.h
include/configs/kmcent2.h

index e7003d3b647e4ee4d664e9984805d0bbb09a4c8b..f4f5ebfe0c40a50a8b933d34eb71ea2ff32a0493 100644 (file)
@@ -1216,6 +1216,10 @@ config SYS_FSL_LBC_CLK_DIV
 config ENABLE_36BIT_PHYS
        bool "Enable 36bit physical address space support"
 
+config SYS_BOOK3E_HV
+       bool "Category E.HV is supported"
+       depends on BOOKE
+
 config SYS_MPC85XX_NO_RESETVEC
        bool "Discard resetvec section and move bootpg section up"
        depends on MPC85xx
index 5063470d85470df2445ef18292ef718e64322720..459b9e6c5443a89be8c177d6f4d78a860d23e74b 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index a64f8924dd2d2e2e344b438bc26d106969a82f79..6ff6a42830693037dbde4cc27d66e3f8ec2dd709 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index f295174da52710f279e242e7a51d23fd56af77f3..a5872faa474167fb42ec4e6fc3e92be938d5cc4b 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index e3dd1e93e3234e95f2496cc1e47566120f7c820c..247db8e0fef996d840d138420afef50fcfa6f76f 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 3e4cb5180ea5db01bfbddf54127c37d6a459eb4b..91ad3ee30515fe2557f97707ceb79c1eab04c8c9 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 66eb6c3f3d9187555d94162f225e8dc04524ae37..6ca91fe77ed27a584981fb4cfb16666cd62b3ecc 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 87c62be04f8d5e278d908013d2ceac3d3ab672ab..13857b8208f8af1c8dc9120d32e79bdaa74f5696 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index d083c256b089c9b6fc2450cf253a176efa7e0086..b587d525a266ca0910570731cbfe138fdc0e428d 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index ed6f3de96ec58d157e52699968e750a371a5ce5e..c88a869bc8f1dbe070afe639763749c2d6d711a3 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index e77085ae3e2d3d26cfce10535fd2b00c0477de3b..a627475420f6977bc5b493f1dd635f6f9c7ecf42 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 91aa75d9e1ce6fa1259dd0f86d1a18e83f0760d1..82371ea9897b489cba06817afa68edf105ede5ef 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 3a48362c3b52bfdc18f612144ca2b3561b87b9bb..be3d388484f569659327751e5effcd0686c9210b 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 9aa293dc22923afc1b4163b6e643046e0ca1af14..4dcdb391e408080eeb4da072566254f335b8756c 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 6f0d51a7abfe3a1a33e09c8dd3d1dab49d32dfd3..7620f4879a7985788103e773d0254391cff4f204 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index ae5f7b7ba3485775c509efeedf38ee00521d4c0f..68573a5c98211932c6d70b12aa69f4505b2d3c8f 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index ad33aa8fe23b882733c81a799b3c4a5928bc4044..d10799f83cf3bf213f9c39018f1708c5ae7d5c4c 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
index 06bb7b79534478ad7c2506da71544165e89c17b1..22c404e27c202cae66fa10525fef298ad46cc502 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index f88fb381a2586f6f5181cfe7f516ffa28e9aaae1..2f1e9ca46ef5bc2f868d73a07787f27868694828 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index a0908ac83a78c5a532d9f9e0b6ea7a4cb094b5f9..5c30e9fe37652294291c17ca487d0b08a2405ec7 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index bb32ddf8c14492fb6c9f5340ad28dced330b724a..00ea2175a77e59591dd8d28887e4ecf380c99c66 100644 (file)
@@ -12,6 +12,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
index 932a4e1507d45b00545be2ba53ce15df32e50cde..c738e9c4133e4122729371ae065cf1c95be573ad 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index 0c4e339da79712b403b26fe6a08379ab3d23967a..bc38fa68b2f352daec870068c6b0e84fc222ae93 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index 44458015c24f0685e934b347b9814b372d725ef6..af7df9ee91c33875438ef30507fa75be30b9defa 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 05e46e6cacd02e9c13f36725ecdd247e026c2283..e7ce3631e0a126bcf09a6310d52da773456aa26c 100644 (file)
@@ -19,6 +19,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
index 1818762ded906c1ea2dde98996d00d743c9d28b0..a2a2c589d7cefb075fbf5b1f498b41cc9cd52d4b 100644 (file)
@@ -20,6 +20,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
 =======
index 30d1b85a009eeb084a37d02cb3ab4176b2fc6990..4f35dbd945f92a3dcacd47044765f23c4fcadd7b 100644 (file)
@@ -6,6 +6,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_NXP_ESBC=y
 CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000
 CONFIG_PCIE1=y
index 73c50b9245a04e2faeb77026a551d0372d1c41a7..b02939f679ceef416ecdc78046257932aa3ea5f7 100644 (file)
@@ -22,6 +22,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
 =======
index 48ef69cbbb79fd5bcfd6b1c1233ccbe52ebb3ae2..6caffde6d4e42f5dc98a0602fd6aa675c95a7ac8 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SRIO_PCIE_BOOT_SLAVE=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index a94fd3f42e30a41dd362dc347f1b77643c3d2855..4ec70d678c049be32edf1da9c016567a914340d7 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 6566226abc8581a2908813accbada7d654e0cd88..f382288ebbb4acc68662a9bd38fc9c240f4d87bf 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
index 3333ac145ad2e44ea1f14626ef53177020515d8c..5837b3d26daf05ddb915e92be0f8f600673ff056 100644 (file)
@@ -17,6 +17,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
 =======
index 5812daad55ccc6ece49f16e39373259a74a67347..ab191c702f1a66217c0c13e9390dfd5218920776 100644 (file)
@@ -19,6 +19,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
 =======
index 563d0b5f315a4636e2dace0670be5a2ba3b3baa6..fff8a26b32390892e409a500369aca7a6805f30a 100644 (file)
@@ -12,8 +12,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
-<<<<<<< HEAD
-=======
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
@@ -22,7 +21,6 @@ CONFIG_VID=y
 CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv"
 CONFIG_VOL_MONITOR_IR36021_READ=y
 CONFIG_VOL_MONITOR_IR36021_SET=y
->>>>>>> Convert CONFIG_PCIE1 et al to Kconfig
 CONFIG_SYS_MEMTEST_START=0x00200000
 CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_MP=y
index 98443438a940e5c4897aea00c26049e7bcc4fbd6..c5ab7af33517e10b76867ffa880832678489cf50 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
index 004f67703ff706ace45a5b1fb55a108770f003bd..83f47250094eb92ba39bc2c391833b618709f100 100644 (file)
@@ -17,6 +17,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
 <<<<<<< HEAD
index 610f3f89693247b3699b9104bd1b2e315587823b..0c5365217eea28fc59f3eb18230938db7b5923b8 100644 (file)
@@ -19,6 +19,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
 <<<<<<< HEAD
index ca6a741fef41e1019f5a07877e10f3b448556120..66a9d5dcadb08c4b140a0802899aa2a12320f8b9 100644 (file)
@@ -12,6 +12,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_T2080RDB_REV_D=y
 <<<<<<< HEAD
 =======
index 3e43f9bb98ff019ef5c7862dc0eaec7a3250c94f..639cb80e8e925ea9d1373fe59d3d156dd023ab46 100644 (file)
@@ -17,6 +17,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
 =======
index 9f6457fc3a30f1893c88621d2f623f5815e6f391..6f403619d67211c3a238373630d9e63577d7d7a6 100644 (file)
@@ -12,8 +12,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
-<<<<<<< HEAD
-=======
+CONFIG_SYS_BOOK3E_HV=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
@@ -22,7 +21,6 @@ CONFIG_VID=y
 CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv"
 CONFIG_VOL_MONITOR_IR36021_READ=y
 CONFIG_VOL_MONITOR_IR36021_SET=y
->>>>>>> Convert CONFIG_PCIE1 et al to Kconfig
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index cd6fb9675b007647fb6ecced936ab5fae1bc4d80..38d33c20dc99357676646c30223145cbaebbdefc 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_KMCENT2=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_BOOK3E_HV=y
 # CONFIG_DEEP_SLEEP is not set
 CONFIG_PCIE1=y
 CONFIG_KM_DEF_NETDEV="eth2"
index e019c168434ab8c89e42f67129d1d1456dcf7546..2dc7da621600a8b958bad939690fcf73c9539a8e 100644 (file)
@@ -25,7 +25,6 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
index a519b5a9355e7c2d79253c0d9dca25b38c7914e9..159002d1ed8310919b16ebbc03d3b28ef09f9fcf 100644 (file)
@@ -14,7 +14,6 @@
 #include <linux/stringify.h>
 
 /* High Level Configuration Options */
-#define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
index 3a7c643cfc9433c49fc5ddf43049901af91e62dc..25d82db0f8e986abb6e45d33aacc0eacf64dd5d8 100644 (file)
@@ -53,7 +53,6 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
index eff22c18bb72c17cea9fcb6e30b728cce2171eb3..969e7f728feb06e9c5f546a11d0d4238485a3b52 100644 (file)
@@ -21,7 +21,6 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_SYS_BOOK3E_HV   /* Category E.HV supported */
 
 #define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
index ba9bfdd72f7e75fa9322af6014e5eadf3507c921..098125989e951226dd7582f713c43ee8c6c43626 100644 (file)
@@ -16,7 +16,6 @@
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
 
 /* High Level Configuration Options */
-#define CONFIG_SYS_BOOK3E_HV   /* Category E.HV supported */
 
 #define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
index 12b479f9c773916b4010a1ae0c99295cbe12cf71..6ec3c6a8c039852611109da100494f51d8f56d86 100644 (file)
@@ -34,7 +34,6 @@
 #endif /* CONFIG_RAMBOOT_PBL */
 
 /* High Level Configuration Options */
-#define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
index 2252bf89543dd4e3c19fc6688c46317def3a817e..d8ad45688167e951739d17db0aa977f0db4e9d16 100644 (file)
@@ -28,7 +28,6 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
index ed24733abf57fd226fcdd609a7cd59565011d4fc..eafdc35c27bb9af58dc3d8d21430a4b6a8818a63 100644 (file)
 #define KM_I2C_DEBLOCK_SDA     21
 
 /* High Level Configuration Options */
-#define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 #define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 
 #define CONFIG_RESET_VECTOR_ADDRESS    0xebfffffc