arm: dts: k3-j7200-r5-common-proc-board: Set parent clock for clock ID 323

Previously, dynamic frequency scaling supported rates only through fixed
divison.

This virtual clock mux configuration enables more varied rates on A72
clock ID 202 by setting up the required register.

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Reid Tonking <reidt@ti.com>

diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
index f0a73605020f1be5ccb0dd59492aaf96ecdc0c08..018faaa13b6a7cdc41b46f73171e3ea6a4c6551f 100644 (file)
--- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
@@ -24,7 +24,8 @@
                                <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 202 0>;
                clocks = <&k3_clks 61 1>;
-               assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
+               assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 323 0>;
+               assigned-clock-parents= <0>, <0>, <&k3_clks 323 2>;
                assigned-clock-rates = <2000000000>, <200000000>;
                ti,sci = <&dmsc>;
                ti,sci-proc-id = <32>;