mpc83xx: don't set SICRH_TSOBI1 to RMII/RTBI operation

In GMII mode (which operates at 3.3V) both SICRH TSEC1/2 output buffer
impedance bits should be clear, i.e., SICRH[TSIOB1] = 0 and SICRH[TSIOB2] = 0.
SICRH[TSIOB1] was erroneously being set high.

U-Boot always operated this PHY interface in GMII mode.  It is assumed this
was missed in the clean up by the original board porters, and copied along
to the TQM and sbc boards.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Ira Snyder <iws@ovro.caltech.edu>
Reviewed-by: David Hawkins <dwh@ovro.caltech.edu>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Dave Liu <DaveLiu@freescale.com>

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 3c574039f3162c16848fd3aecec8afc6993dfd33..2d2799e111c18b4dc87e37bc0170c4b4bc5ddfd8 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -598,7 +598,7 @@
 #define CONFIG_SYS_SCCR_TSEC2CM        1       /* TSEC2 & I2C0 clock mode (0-3) */
 
 /* System IO Config */
-#define CONFIG_SYS_SICRH SICRH_TSOBI1
+#define CONFIG_SYS_SICRH 0
 #define CONFIG_SYS_SICRL SICRL_LDP_A
 
 #define CONFIG_SYS_HID0_INIT   0x000000000

diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 5ca8720a32eb0f76cc57f971ab5508d548ad0212..551073025fd05dd5ffb3dd2651d1b3af426c41c7 100644 (file)
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -393,7 +393,7 @@ extern int tqm834x_num_flash_banks;
 #endif
 
 /* System IO Config */
-#define CONFIG_SYS_SICRH       SICRH_TSOBI1
+#define CONFIG_SYS_SICRH       0
 #define CONFIG_SYS_SICRL       SICRL_LDP_A
 
 /* i-cache and d-cache disabled */

diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index d0338f168b62439442e11b5e92beb14b5903016c..edd928d81b5da112ffa092a01f277efc51549655 100644 (file)
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -519,7 +519,7 @@
 #endif
 
 /* System IO Config */
-#define CONFIG_SYS_SICRH SICRH_TSOBI1
+#define CONFIG_SYS_SICRH 0
 #define CONFIG_SYS_SICRL SICRL_LDP_A
 
 #define CONFIG_SYS_HID0_INIT   0x000000000