ARM: AM43xx: clocks: Add dpll and clock data

Add dpll and clock data for AM43xx

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

diff --git a/arch/arm/cpu/armv7/am33xx/Makefile b/arch/arm/cpu/armv7/am33xx/Makefile
index 7fd21af1f24d3b166b581ebeaa696dc334f728e6..bd8e7528bb6b1ef05b898e120e72bc019b7bcc64 100644 (file)
--- a/arch/arm/cpu/armv7/am33xx/Makefile
+++ b/arch/arm/cpu/armv7/am33xx/Makefile
@@ -10,7 +10,12 @@ LIB  = $(obj)lib$(SOC).o
 
 COBJS-$(CONFIG_AM33XX) += clock_am33xx.o
 COBJS-$(CONFIG_TI814X) += clock_ti814x.o
-COBJS-$(CONFIG_AM33XX) += clock.o
+COBJS-$(CONFIG_AM43XX) += clock_am43xx.o
+
+ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX),)
+COBJS  += clock.o
+endif
+
 COBJS  += sys_info.o
 COBJS  += mem.o
 COBJS  += ddr.o

diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
new file mode 100644 (file)
index 0000000..c4890f2
--- /dev/null
+++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
@@ -0,0 +1,110 @@
+/*
+ * clock_am43xx.c
+ *
+ * clocks for AM43XX based boards
+ * Derived from AM33XX based boards
+ *
+ * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/io.h>
+
+struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
+struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;
+
+const struct dpll_regs dpll_mpu_regs = {
+       .cm_clkmode_dpll        = CM_WKUP + 0x560,
+       .cm_idlest_dpll         = CM_WKUP + 0x564,
+       .cm_clksel_dpll         = CM_WKUP + 0x56c,
+       .cm_div_m2_dpll         = CM_WKUP + 0x570,
+};
+
+const struct dpll_regs dpll_core_regs = {
+       .cm_clkmode_dpll        = CM_WKUP + 0x520,
+       .cm_idlest_dpll         = CM_WKUP + 0x524,
+       .cm_clksel_dpll         = CM_WKUP + 0x52C,
+       .cm_div_m4_dpll         = CM_WKUP + 0x538,
+       .cm_div_m5_dpll         = CM_WKUP + 0x53C,
+       .cm_div_m6_dpll         = CM_WKUP + 0x540,
+};
+
+const struct dpll_regs dpll_per_regs = {
+       .cm_clkmode_dpll        = CM_WKUP + 0x5E0,
+       .cm_idlest_dpll         = CM_WKUP + 0x5E4,
+       .cm_clksel_dpll         = CM_WKUP + 0x5EC,
+       .cm_div_m2_dpll         = CM_WKUP + 0x5F0,
+};
+
+const struct dpll_regs dpll_ddr_regs = {
+       .cm_clkmode_dpll        = CM_WKUP + 0x5A0,
+       .cm_idlest_dpll         = CM_WKUP + 0x5A4,
+       .cm_clksel_dpll         = CM_WKUP + 0x5AC,
+       .cm_div_m2_dpll         = CM_WKUP + 0x5B0,
+};
+
+const struct dpll_params dpll_mpu = {
+               -1, -1, -1, -1, -1, -1, -1};
+const struct dpll_params dpll_core = {
+               -1, -1, -1, -1, -1, -1, -1};
+const struct dpll_params dpll_per = {
+               -1, -1, -1, -1, -1, -1, -1};
+
+void setup_clocks_for_console(void)
+{
+       /* Do not add any spl_debug prints in this function */
+       clrsetbits_le32(&cmwkup->wkclkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK,
+                       CD_CLKCTRL_CLKTRCTRL_SW_WKUP <<
+                       CD_CLKCTRL_CLKTRCTRL_SHIFT);
+
+       /* Enable UART0 */
+       clrsetbits_le32(&cmwkup->wkup_uart0ctrl,
+                       MODULE_CLKCTRL_MODULEMODE_MASK,
+                       MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN <<
+                       MODULE_CLKCTRL_MODULEMODE_SHIFT);
+}
+
+void enable_basic_clocks(void)
+{
+       u32 *const clk_domains[] = {
+               &cmper->l3clkstctrl,
+               &cmper->l3sclkstctrl,
+               &cmper->l4lsclkstctrl,
+               &cmwkup->wkclkstctrl,
+               &cmper->emifclkstctrl,
+               0
+       };
+
+       u32 *const clk_modules_explicit_en[] = {
+               &cmper->l3clkctrl,
+               &cmper->l4lsclkctrl,
+               &cmper->l4fwclkctrl,
+               &cmwkup->wkl4wkclkctrl,
+               &cmper->l3instrclkctrl,
+               &cmper->l4hsclkctrl,
+               &cmwkup->wkgpio0clkctrl,
+               &cmwkup->wkctrlclkctrl,
+               &cmper->timer2clkctrl,
+               &cmper->gpmcclkctrl,
+               &cmper->elmclkctrl,
+               &cmper->mmc0clkctrl,
+               &cmper->mmc1clkctrl,
+               &cmwkup->wkup_i2c0ctrl,
+               &cmper->gpio1clkctrl,
+               &cmper->gpio2clkctrl,
+               &cmper->gpio3clkctrl,
+               &cmper->i2c1clkctrl,
+               &cmper->emiffwclkctrl,
+               &cmper->emifclkctrl,
+               &cmper->otfaemifclkctrl,
+               0
+       };
+
+       do_enable_clocks(clk_domains, clk_modules_explicit_en, 1);
+}

diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index f5b9100b82ad677abdca621b1a13937cd4f687c8..51b257683d3a7ba2c270ea389555adc64591725d 100644 (file)
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <spl.h>
+#include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/mux.h>
 #include "board.h"
@@ -19,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifdef CONFIG_SPL_BUILD
 
 const struct dpll_params dpll_ddr = {
-               266, OSC-1, 1, -1, -1, -1, -1};
+               -1, -1, -1, -1, -1, -1, -1};
 
 const struct dpll_params *get_dpll_ddr_params(void)
 {