OMAP4460: TPS Ensure SET1 is selected after voltage configuration

TPS SET0/SET1 register is selected by a GPIO pin on OMAP4460 platforms.
Currently we control this pin with a mux configuration as part of
boot sequence.
Current configuration results in the following voltage waveform:
                           |---------------| (SET1 default 1.4V)
                           |               --------(programmed voltage)
                           | <- (This switch happens on mux7,pullup)
vdd_mpu(TPS)         -----/ (OPP boot voltage)
                                             --------- (programmed voltage)
vdd_core(TWL6030)    -----------------------/ (OPP boot voltage)
Problem 1)                |<----- Tx ------>|
   timing violation for a duration Tx close to few milliseconds.
Problem 2) voltage of MPU goes beyond spec for even the highest of MPU OPP.

By using GPIO as recommended as standard procedure by TI, the sequence
changes to:
                                  -------- (programmed voltage)
vdd_mpu(TPS)         ------------/ (Opp boot voltage)
                                   --------- (programmed voltage)
vdd_core(TWL6030)    -------------/ (OPP boot voltage)

NOTE: This does not attempt to address OMAP5 - Aneesh please confirm

Reported-by: Isabelle Gros <i-gros@ti.com>
Reported-by: Jerome Angeloni <j-angeloni@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index 90d31567e167e45685a31b949636ee79b6f75d7f..c02d73cd8ac139f930ed43d4e69571b8dba496f8 100644 (file)
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -360,9 +360,22 @@ static void setup_non_essential_dplls(void)
 }
 #endif
 
-void do_scale_tps62361(u32 reg, u32 volt_mv)
+void do_scale_tps62361(int gpio, u32 reg, u32 volt_mv)
 {
        u32 step;
+       int ret = 0;
+
+       /* See if we can first get the GPIO if needed */
+       if (gpio >= 0)
+               ret = gpio_request(gpio, "TPS62361_VSEL0_GPIO");
+       if (ret < 0) {
+               printf("%s: gpio %d request failed %d\n", __func__, gpio, ret);
+               gpio = -1;
+       }
+
+       /* Pull the GPIO low to select SET0 register, while we program SET1 */
+       if (gpio >= 0)
+               gpio_direction_output(gpio, 0);
 
        step = volt_mv - TPS62361_BASE_VOLT_MV;
        step /= 10;
@@ -370,6 +383,10 @@ void do_scale_tps62361(u32 reg, u32 volt_mv)
        debug("do_scale_tps62361: volt - %d step - 0x%x\n", volt_mv, step);
        if (omap_vc_bypass_send_value(TPS62361_I2C_SLAVE_ADDR, reg, step))
                puts("Scaling voltage failed for vdd_mpu from TPS\n");
+
+       /* Pull the GPIO high to select SET1 register */
+       if (gpio >= 0)
+               gpio_direction_output(gpio, 1);
 }
 
 void do_scale_vcore(u32 vcore_reg, u32 volt_mv)

diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c
index 976cfd55b8e9ab5aaa34c08831c20639a9a8d388..14313129a32729ba3373666d67b4ae27a7637cc3 100644 (file)
--- a/arch/arm/cpu/armv7/omap4/clocks.c
+++ b/arch/arm/cpu/armv7/omap4/clocks.c
@@ -281,7 +281,8 @@ void scale_vcores(void)
        /* TPS - supplies vdd_mpu on 4460 */
        if (omap_rev >= OMAP4460_ES1_0) {
                volt = 1203;
-               do_scale_tps62361(TPS62361_REG_ADDR_SET1, volt);
+               do_scale_tps62361(TPS62361_VSEL0_GPIO,
+                                 TPS62361_REG_ADDR_SET1, volt);
        }
 
        /*

diff --git a/arch/arm/cpu/armv7/omap5/clocks.c b/arch/arm/cpu/armv7/omap5/clocks.c
index 0a614f0970d7ace0bf01d9776314a4007ee08749..07a755658913697f488b2a08bf82deb7690d0ab8 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/clocks.c
+++ b/arch/arm/cpu/armv7/omap5/clocks.c
@@ -247,7 +247,7 @@ void scale_vcores(void)
 
        /* Enable 1.22V from TPS for vdd_mpu */
        volt = 1220;
-       do_scale_tps62361(TPS62361_REG_ADDR_SET1, volt);
+       do_scale_tps62361(-1, TPS62361_REG_ADDR_SET1, volt);
 
        /* VCORE 1 - for vdd_core */
        volt = 1000;

diff --git a/arch/arm/include/asm/arch-omap4/clocks.h b/arch/arm/include/asm/arch-omap4/clocks.h
index 4e93950cbc55b40b7145e12f460f833da5878662..62a339f184d5f1171881fa7beed5e1780bac7625 100644 (file)
--- a/arch/arm/include/asm/arch-omap4/clocks.h
+++ b/arch/arm/include/asm/arch-omap4/clocks.h
@@ -740,7 +740,7 @@ extern struct omap4_prcm_regs *const prcm;
 extern const u32 sys_clk_array[8];
 
 void scale_vcores(void);
-void do_scale_tps62361(u32 reg, u32 volt_mv);
+void do_scale_tps62361(int gpio, u32 reg, u32 volt_mv);
 u32 omap_ddr_clk(void);
 void do_scale_vcore(u32 vcore_reg, u32 volt_mv);
 void setup_post_dividers(u32 *const base, const struct dpll_params *params);

diff --git a/arch/arm/include/asm/arch-omap5/clocks.h b/arch/arm/include/asm/arch-omap5/clocks.h
index 28b9ff7826f8158312104ebee1bce5f45620ec63..55145bbee2ebf486a4d3a7c2d8dd2608053a6bae 100644 (file)
--- a/arch/arm/include/asm/arch-omap5/clocks.h
+++ b/arch/arm/include/asm/arch-omap5/clocks.h
@@ -686,7 +686,7 @@ extern struct omap5_prcm_regs *const prcm;
 extern const u32 sys_clk_array[8];
 
 void scale_vcores(void);
-void do_scale_tps62361(u32 reg, u32 volt_mv);
+void do_scale_tps62361(int gpio, u32 reg, u32 volt_mv);
 u32 omap_ddr_clk(void);
 void do_scale_vcore(u32 vcore_reg, u32 volt_mv);
 void setup_post_dividers(u32 *const base, const struct dpll_params *params);

diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h
index 5b66a14242cde701e1694664b9f2ac7b383ff293..3efc22a0284d1626a7a04997a7388d5eb37f0cba 100644 (file)
--- a/board/ti/panda/panda_mux_data.h
+++ b/board/ti/panda/panda_mux_data.h
@@ -76,7 +76,7 @@ const struct pad_conf_entry wkup_padconf_array_essential[] = {
 
 const struct pad_conf_entry wkup_padconf_array_essential_4460[] = {
 
-{PAD1_FREF_CLK4_REQ, (PTU | M7)}, /* gpio_wk7 for TPS: safe mode + pull up */
+{PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 for TPS: Mode 3 */
 
 };
 

diff --git a/board/ti/sdp4430/sdp4430_mux_data.h b/board/ti/sdp4430/sdp4430_mux_data.h
index 0a20968978923d10a0ea76eaa809365460eae1e6..6140b999efd555aa7b657a27b86210c80de8819a 100644 (file)
--- a/board/ti/sdp4430/sdp4430_mux_data.h
+++ b/board/ti/sdp4430/sdp4430_mux_data.h
@@ -67,7 +67,7 @@ const struct pad_conf_entry wkup_padconf_array_essential[] = {
 
 const struct pad_conf_entry wkup_padconf_array_essential_4460[] = {
 
-{PAD1_FREF_CLK4_REQ, (PTU | M7)}, /* gpio_wk7 for TPS: safe mode + pull up */
+{PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 for TPS: Mode 3 */
 
 };