dm: exynos: Add pinctrl settings for smdkc100

These describe the GPIOs in enough detail for U-Boot's GPIO driver to
operate.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/dts/s5pc100-pinctrl.dtsi b/arch/arm/dts/s5pc100-pinctrl.dtsi
new file mode 100644 (file)
index 0000000..bd9f97c
--- /dev/null
+++ b/arch/arm/dts/s5pc100-pinctrl.dtsi
@@ -0,0 +1,180 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/ {
+       pinctrl@e0300000 {
+               gpa0: gpa0 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpa1: gpa1 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpb: gpb {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpc: gpc {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpd: gpd {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpe0: gpe0 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpe1: gpe1 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpf0: gpf0 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpf1: gpf1 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpf2: gpf2 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpf3: gpf3 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpg0: gpg0 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpg1: gpg1 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpg2: gpg2 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpg3: gpg3 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpi: gpi {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpj0: gpj0 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpj1: gpj1 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpj2: gpj2 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpj3: gpj3 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpj4: gpj4 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpk0: gpk0 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpk1: gpk1 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpk2: gpk2 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpk3: gpk3 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpl0: gpl0 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpl1: gpl1 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpl2: gpl2 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpl3: gpl3 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gpl4: gpl4 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gph0: gph0 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gph1: gph1 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gph2: gph2 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               gph3: gph3 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+       };
+};

diff --git a/arch/arm/dts/s5pc1xx-smdkc100.dts b/arch/arm/dts/s5pc1xx-smdkc100.dts
index 42754ce811c7c5eab93a298e23309181b728d765..95f15ed48d39ccd57e029f7abe3124ddcc1e9319 100644 (file)
--- a/arch/arm/dts/s5pc1xx-smdkc100.dts
+++ b/arch/arm/dts/s5pc1xx-smdkc100.dts
@@ -9,6 +9,7 @@
 /dts-v1/;
 
 #include "skeleton.dtsi"
+#include "s5pc100-pinctrl.dtsi"
 
 / {
        model = "Samsung SMDKC100 based on S5PC100";
@@ -17,6 +18,12 @@
        aliases {
                serial0 = "/serial@ec000000";
                console = "/serial@ec000000";
+               pinctrl0 = &pinctrl0;
+       };
+
+       pinctrl0: pinctrl@e0300000 {
+               compatible = "samsung,s5pc100-pinctrl";
+               reg = <0xe0200000 0x1000>;
        };
 
        serial@ec000000 {