]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mmc: sdhci: Enable HS400 support if available in caps
authorAshok Reddy Soma <ashok.reddy.soma@amd.com>
Tue, 10 Jan 2023 11:31:23 +0000 (04:31 -0700)
committerJaehoon Chung <jh80.chung@samsung.com>
Tue, 31 Jan 2023 13:02:27 +0000 (22:02 +0900)
HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
drivers/mmc/sdhci.c
include/sdhci.h

index 181ab9b7cb2a073f2dc95ea999e2ef1e10ce3ea3..c6b250b9a1b5f64de83ab938813b17a06a1039a7 100644 (file)
@@ -995,6 +995,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
                cfg->host_caps |= MMC_CAP(UHS_SDR50);
        }
 
+       if ((host->quirks & SDHCI_QUIRK_CAPS_BIT63_FOR_HS400) &&
+           (caps_1 & SDHCI_SUPPORT_HS400))
+               cfg->host_caps |= MMC_CAP(MMC_HS_400);
+
        if (caps_1 & SDHCI_SUPPORT_DDR50)
                cfg->host_caps |= MMC_CAP(UHS_DDR50);
 
index 64a3d309da569e079a91c623847b6f3b595267a3..70fefca2a9729f007c19019725f4fae99648dc45 100644 (file)
 #define  SDHCI_SUPPORT_SDR50   0x00000001
 #define  SDHCI_SUPPORT_SDR104  0x00000002
 #define  SDHCI_SUPPORT_DDR50   0x00000004
+#define  SDHCI_SUPPORT_HS400   BIT(31)
 #define  SDHCI_USE_SDR50_TUNING        0x00002000
 
 #define  SDHCI_CLOCK_MUL_MASK  0x00FF0000
 #define SDHCI_QUIRK_USE_WIDE8          (1 << 8)
 #define SDHCI_QUIRK_NO_1_8_V           (1 << 9)
 #define SDHCI_QUIRK_SUPPORT_SINGLE     (1 << 10)
+/* Capability register bit-63 indicates HS400 support */
+#define SDHCI_QUIRK_CAPS_BIT63_FOR_HS400       BIT(11)
 
 /* to make gcc happy */
 struct sdhci_host;