* Switched default PCI speed for 8540 ADS back to 33MHz

* Added comments and a printf to warn that PCI-X won't
  work at 33MHz
  Patch by Andy Fleming 17-Mar-2006

Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/cpu/mpc85xx/pci.c b/cpu/mpc85xx/pci.c
index ca11bce22ea2b78bd7c35305bf208491df9590a7..cfb7dcdc89551a0d6023726a67fb390e69ddecd1 100644 (file)
--- a/cpu/mpc85xx/pci.c
+++ b/cpu/mpc85xx/pci.c
@@ -72,6 +72,9 @@ pci_mpc85xx_init(struct pci_controller *board_hose)
 
        if (!(gur->pordevsr & PORDEVSR_PCI)) {
                /* PCI-X init */
+               if (CONFIG_SYS_CLK_FREQ < 66000000)
+                       printf("PCI-X will only work at 66 MHz\n");
+
                reg16 = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ
                        | PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
                pci_hose_write_config_word(hose, dev, PCIX_COMMAND, reg16);

diff --git a/doc/README.mpc85xxads b/doc/README.mpc85xxads
index f0cf782a8fc92434943ccd3ef9d1f59ae246fcf4..ae8202bdd17d4146be4f0196dbb8ee4ab9d1a530 100644 (file)
--- a/doc/README.mpc85xxads
+++ b/doc/README.mpc85xxads
@@ -100,6 +100,9 @@ Updated 13-July-2004 Jon Loeliger
        SW7[1:4]  =    0101 =  5    => 5 x 66    = 330  CCB Sysclk
        SW7[5:6]  =      01         => 5:2 x 330 = 825  Core clock
 
+    In order to use PCI-X (only in the first PCI slot.  The one with
+    the RIO connector), you need to set SW1[4] (config) to 1 (off).
+    Also, configure the board to run PCI at 66 MHz.
 
 2. MEMORY MAP TO WORK WITH LINUX KERNEL
 

diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 81ee945d4999e639ec14ff4a584e763b0518b395..8e4d2c95a44eb763d7d838a9e64bc57241ed9d48 100644 (file)
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -68,10 +68,14 @@
  * The board, however, can run at 66MHz.  In any event, this value
  * must match the settings of some switches.  Details can be found
  * in the README.mpc85xxads.
+ *
+ * XXX -- Can't we run at 66 MHz, anyway?  PCI should drop to
+ * 33MHz to accommodate, based on a PCI pin.
+ * Note that PCI-X won't work at 33MHz.
  */
 
 #ifndef CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_CLK_FREQ    66000000
+#define CONFIG_SYS_CLK_FREQ    33000000
 #endif