keystone2: k2l-evm: add board support

This patch adds Keystone II Lammar (K2L) EVM board support.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>

diff --git a/arch/arm/cpu/armv7/keystone/Kconfig b/arch/arm/cpu/armv7/keystone/Kconfig
index 8249b5e27036f7380ef19252792e59553f4f1b1f..393885f710d21ac50931c9b7e3c02046b8123159 100644 (file)
--- a/arch/arm/cpu/armv7/keystone/Kconfig
+++ b/arch/arm/cpu/armv7/keystone/Kconfig
@@ -9,6 +9,9 @@ config TARGET_K2HK_EVM
 config TARGET_K2E_EVM
        bool "TI Keystone 2 Edison EVM"
 
+config TARGET_K2L_EVM
+       bool "TI Keystone 2 Lamar EVM"
+
 endchoice
 
 config SYS_CPU

diff --git a/arch/arm/include/asm/arch-keystone/clock-k2l.h b/arch/arm/include/asm/arch-keystone/clock-k2l.h
index ad2e40747ad3fcfed94e77c623ae96e602bb6675..bb9a5c4dcf3bca5b7310082fe374a1de9c629e3e 100644 (file)
--- a/arch/arm/include/asm/arch-keystone/clock-k2l.h
+++ b/arch/arm/include/asm/arch-keystone/clock-k2l.h
@@ -70,7 +70,9 @@ enum {
 
 #define CORE_PLL_799   {CORE_PLL, 13, 1, 2}
 #define CORE_PLL_983   {CORE_PLL, 16, 1, 2}
+#define CORE_PLL_1000  {CORE_PLL, 114, 7, 2}
 #define CORE_PLL_1167  {CORE_PLL, 19, 1, 2}
+#define CORE_PLL_1198  {CORE_PLL, 39, 2, 2}
 #define CORE_PLL_1228  {CORE_PLL, 20, 1, 2}
 #define PASS_PLL_1228  {PASS_PLL, 20, 1, 2}
 #define PASS_PLL_983   {PASS_PLL, 16, 1, 2}
@@ -79,8 +81,12 @@ enum {
 #define TETRIS_PLL_737 {TETRIS_PLL, 12, 1, 2}
 #define TETRIS_PLL_799 {TETRIS_PLL, 13, 1, 2}
 #define TETRIS_PLL_983 {TETRIS_PLL, 16, 1, 2}
+#define TETRIS_PLL_1000        {TETRIS_PLL, 114, 7, 2}
 #define TETRIS_PLL_1167        {TETRIS_PLL, 19, 1, 2}
+#define TETRIS_PLL_1198        {TETRIS_PLL, 39, 2, 2}
 #define TETRIS_PLL_1228        {TETRIS_PLL, 20, 1, 2}
+#define TETRIS_PLL_1352        {TETRIS_PLL, 22, 1, 2}
+#define TETRIS_PLL_1401        {TETRIS_PLL, 114, 5, 2}
 #define DDR3_PLL_200   {DDR3_PLL, 4, 1, 2}
 #define DDR3_PLL_400   {DDR3_PLL, 16, 1, 4}
 #define DDR3_PLL_800   {DDR3_PLL, 16, 1, 2}

diff --git a/board/ti/ks2_evm/Kconfig b/board/ti/ks2_evm/Kconfig
index 9c1e103a20fcda9ca9e8c7110e56e90b5c0e5531..96c5f22eadeb544f47b7459356210cb8bea7c6d9 100644 (file)
--- a/board/ti/ks2_evm/Kconfig
+++ b/board/ti/ks2_evm/Kconfig
@@ -23,3 +23,19 @@ config SYS_CONFIG_NAME
        default "k2hk_evm"
 
 endif
+
+if TARGET_K2L_EVM
+
+config SYS_BOARD
+       string
+       default "ks2_evm"
+
+config SYS_VENDOR
+       string
+       default "ti"
+
+config SYS_CONFIG_NAME
+       string
+       default "k2l_evm"
+
+endif

diff --git a/board/ti/ks2_evm/MAINTAINERS b/board/ti/ks2_evm/MAINTAINERS
index 595a80a8bc6fbd201f5737701dca41a9cf7072e1..87c36c9d14a2a8ad6546e735b58dcf5228ac17b7 100644 (file)
--- a/board/ti/ks2_evm/MAINTAINERS
+++ b/board/ti/ks2_evm/MAINTAINERS
@@ -6,3 +6,5 @@ F:      include/configs/k2hk_evm.h
 F:     configs/k2hk_evm_defconfig
 F:     include/configs/k2e_evm.h
 F:     configs/k2e_evm_defconfig
+F:     include/configs/k2l_evm.h
+F:     configs/k2l_evm_defconfig

diff --git a/board/ti/ks2_evm/Makefile b/board/ti/ks2_evm/Makefile
index 00f1164833c29f9483c714047167c9c7d6e7b330..071dbee180ad466221f16a88e745ac30f6b36bf7 100644 (file)
--- a/board/ti/ks2_evm/Makefile
+++ b/board/ti/ks2_evm/Makefile
@@ -11,3 +11,5 @@ obj-$(CONFIG_K2HK_EVM) += board_k2hk.o
 obj-$(CONFIG_K2HK_EVM) += ddr3_k2hk.o
 obj-$(CONFIG_K2E_EVM) += board_k2e.o
 obj-$(CONFIG_K2E_EVM) += ddr3_k2e.o
+obj-$(CONFIG_K2L_EVM) += board_k2l.o
+obj-$(CONFIG_K2L_EVM) += ddr3_k2l.o

diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
new file mode 100644 (file)
index 0000000..559d20c
--- /dev/null
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -0,0 +1,72 @@
+/*
+ * K2L EVM : Board initialization
+ *
+ * (C) Copyright 2014
+ *     Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/ddr3.h>
+#include <asm/arch/hardware.h>
+#include <asm/ti-common/ti-aemif.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+unsigned int external_clk[ext_clk_count] = {
+       [sys_clk]       = 122880000,
+       [alt_core_clk]  = 100000000,
+       [pa_clk]        = 122880000,
+       [tetris_clk]    = 122880000,
+       [ddr3_clk]      = 100000000,
+       [pcie_clk]      = 100000000,
+       [sgmii_clk]     = 156250000,
+       [usb_clk]       = 100000000,
+};
+
+static struct pll_init_data core_pll_config[] = {
+       CORE_PLL_799,
+       CORE_PLL_1000,
+       CORE_PLL_1198,
+};
+
+static struct pll_init_data tetris_pll_config[] = {
+       TETRIS_PLL_799,
+       TETRIS_PLL_1000,
+       TETRIS_PLL_1198,
+       TETRIS_PLL_1352,
+       TETRIS_PLL_1401,
+};
+
+static struct pll_init_data pa_pll_config =
+       PASS_PLL_983;
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+       int speed;
+
+       speed = get_max_dev_speed();
+       init_pll(&core_pll_config[speed]);
+
+       init_pll(&pa_pll_config);
+
+       speed = get_max_arm_speed();
+       init_pll(&tetris_pll_config[speed]);
+
+       return 0;
+}
+#endif
+
+#ifdef CONFIG_SPL_BUILD
+static struct pll_init_data spl_pll_config[] = {
+       CORE_PLL_799,
+       TETRIS_PLL_491,
+};
+
+void spl_init_keystone_plls(void)
+{
+       init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
+}
+#endif

diff --git a/board/ti/ks2_evm/ddr3_cfg.c b/board/ti/ks2_evm/ddr3_cfg.c
index f7da9f2bcbaab775f3a80e1ecad375286f4c141a..ab44676793c0b4617ec70ca7cc89117ed51890b8 100644 (file)
--- a/board/ti/ks2_evm/ddr3_cfg.c
+++ b/board/ti/ks2_evm/ddr3_cfg.c
@@ -133,6 +133,42 @@ struct ddr3_emif_config ddr3_1600_4g = {
 };
 #endif
 
+struct ddr3_phy_config ddr3phy_1600_2g = {
+       .pllcr          = 0x0001C000ul,
+       .pgcr1_mask     = (IODDRM_MASK | ZCKSEL_MASK),
+       .pgcr1_val      = ((1 << 2) | (1 << 7) | (1 << 23)),
+       .ptr0           = 0x42C21590ul,
+       .ptr1           = 0xD05612C0ul,
+       .ptr2           = 0, /* not set in gel */
+       .ptr3           = 0x0D861A80ul,
+       .ptr4           = 0x0C827100ul,
+       .dcr_mask       = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK),
+       .dcr_val        = ((1 << 10)),
+       .dtpr0          = 0x9D5CBB66ul,
+       .dtpr1          = 0x12868300ul,
+       .dtpr2          = 0x5002D200ul,
+       .mr0            = 0x00001C70ul,
+       .mr1            = 0x00000006ul,
+       .mr2            = 0x00000018ul,
+       .dtcr           = 0x710035C7ul,
+       .pgcr2          = 0x00F07A12ul,
+       .zq0cr1         = 0x0001005Dul,
+       .zq1cr1         = 0x0001005Bul,
+       .zq2cr1         = 0x0001005Bul,
+       .pir_v1         = 0x00000033ul,
+       .pir_v2         = 0x0000FF81ul,
+};
+
+struct ddr3_emif_config ddr3_1600_2g = {
+       .sdcfg          = 0x6200CE62ul,
+       .sdtim1         = 0x166C9855ul,
+       .sdtim2         = 0x00001D4Aul,
+       .sdtim3         = 0x435DFF53ul,
+       .sdtim4         = 0x543F0CFFul,
+       .zqcfg          = 0x70073200ul,
+       .sdrfc          = 0x00001869ul,
+};
+
 int ddr3_get_dimm_params(char *dimm_name)
 {
        int ret;

diff --git a/board/ti/ks2_evm/ddr3_cfg.h b/board/ti/ks2_evm/ddr3_cfg.h
index 15fcf52ef1980aec5303467f58f3b628c4739368..5bd786cff8e9f6e4ab918229b402c4ad782e71e6 100644 (file)
--- a/board/ti/ks2_evm/ddr3_cfg.h
+++ b/board/ti/ks2_evm/ddr3_cfg.h
@@ -19,6 +19,9 @@ extern struct ddr3_emif_config ddr3_1333_2g;
 extern struct ddr3_phy_config ddr3phy_1600_4g;
 extern struct ddr3_emif_config ddr3_1600_4g;
 
+extern struct ddr3_phy_config ddr3phy_1600_2g;
+extern struct ddr3_emif_config ddr3_1600_2g;
+
 int ddr3_get_dimm_params(char *dimm_name);
 
 #endif /* __DDR3_CFG_H */

diff --git a/board/ti/ks2_evm/ddr3_k2l.c b/board/ti/ks2_evm/ddr3_k2l.c
new file mode 100644 (file)
index 0000000..15a14f2
--- /dev/null
+++ b/board/ti/ks2_evm/ddr3_k2l.c
@@ -0,0 +1,38 @@
+/*
+ * Keystone2: DDR3 initialization
+ *
+ * (C) Copyright 2014
+ *     Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include "ddr3_cfg.h"
+#include <asm/arch/ddr3.h>
+
+static int ddr3_size;
+static struct pll_init_data ddr3_400 = DDR3_PLL_400;
+
+void ddr3_init(void)
+{
+       init_pll(&ddr3_400);
+
+       /* No SO-DIMM, 2GB discreet DDR */
+       printf("DRAM: 2 GiB\n");
+       ddr3_size = 2;
+
+       /* Reset DDR3 PHY after PLL enabled */
+       ddr3_reset_ddrphy();
+
+       ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g);
+       ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g);
+}
+
+/**
+ * ddr3_get_size - return ddr3 size in GiB
+ */
+int ddr3_get_size(void)
+{
+       return ddr3_size;
+}

diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
new file mode 100644 (file)
index 0000000..45399ce
--- /dev/null
+++ b/configs/k2l_evm_defconfig
@@ -0,0 +1,4 @@
+CONFIG_SPL=y
++S:CONFIG_ARM=y
++S:CONFIG_ARCH_KEYSTONE=y
++S:CONFIG_TARGET_K2L_EVM=y

diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
new file mode 100644 (file)
index 0000000..0e1f725
--- /dev/null
+++ b/include/configs/k2l_evm.h
@@ -0,0 +1,37 @@
+/*
+ * Configuration header file for TI's k2l-evm
+ *
+ * (C) Copyright 2012-2014
+ *     Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_K2L_EVM_H
+#define __CONFIG_K2L_EVM_H
+
+/* Platform type */
+#define CONFIG_SOC_K2L
+#define CONFIG_K2L_EVM
+
+/* U-Boot general configuration */
+#define CONFIG_SYS_PROMPT              "K2L EVM # "
+
+#define KS2_ARGS_UBI   "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs "\
+                      "root=ubi0:rootfs rootflags=sync rw ubi.mtd=2,4096\0"
+
+#define KS2_FDT_NAME   "name_fdt=k2l-evm.dtb\0"
+#define KS2_ADDR_MON   "addr_mon=0x0c140000\0"
+#define KS2_NAME_MON   "name_mon=skern-k2l-evm.bin\0"
+#define NAME_UBOOT     "name_uboot=u-boot-spi-k2l-evm.gph\0"
+#define NAME_UBI       "name_ubi=k2l-evm-ubifs.ubi\0"
+
+#include <configs/ks2_evm.h>
+
+/* SPL SPI Loader Configuration */
+#define CONFIG_SPL_TEXT_BASE           0x0c100000
+
+/* NAND Configuration */
+#define CONFIG_SYS_NAND_PAGE_4K
+
+#endif /* __CONFIG_K2L_EVM_H */