Remove unused symbols

This commit removes the following unused symbols:
   CONFIG_SYS_NVRAM_BASE_ADDR
   CONFIG_SYS_NVRAM_SIZE
   CONFIG_SYS_PAXE_BASE
   CONFIG_SYS_PCCNT
   CONFIG_SYS_PCDAT
   CONFIG_SYS_PCDDR
   CONFIG_SYS_PCI1_ADDR
   CONFIG_SYS_PCI2_ADDR
   CONFIG_SYS_PCI1_IO_BUS
   CONFIG_SYS_PCI1_IO_SIZE
   CONFIG_SYS_PCI1_MEM_BUS
   CONFIG_SYS_PCI1_MEM_SIZE
   CONFIG_SYS_PCIE3_ADDR
   CONFIG_SYS_PCIE4_ADDR
   CONFIG_SYS_PCIE3_IO_PHYS
   CONFIG_SYS_PCIE3_IO_VIRT
   CONFIG_SYS_PCIE4_IO_PHYS
   CONFIG_SYS_PCIE4_IO_VIRT
   CONFIG_SYS_PLL_SETTLING_TIME
   CONFIG_SYS_QMAN_CENA_BASE
   CONFIG_SYS_QMAN_SP_CENA_SIZE
   CONFIG_SYS_RCAR_I2C0_BASE
   CONFIG_SYS_RCAR_I2C1_BASE
   CONFIG_SYS_RCAR_I2C2_BASE
   CONFIG_SYS_RCAR_I2C3_BASE
   CONFIG_SYS_SATA
   CONFIG_SYS_SDRAM_BASE2
   CONFIG_SYS_SGMII_REFCLK_MHZ
   CONFIG_SYS_SGMII_LINERATE_MHZ
   CONFIG_SYS_SGMII_RATESCALE
   CONFIG_SYS_SH_SDHI0_BASE
   CONFIG_SYS_SH_SDHI0_BASE
   CONFIG_SYS_SH_SDHI1_BASE
   CONFIG_SYS_SH_SDHI2_BASE
   CONFIG_SYS_SH_SDHI3_BASE
   CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
   CONFIG_SYS_SPI_U_BOOT_SIZE
   CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR
   CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN
   CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT
   CONFIG_SYS_VCXK_BASE
   CONFIG_SYS_VCXK_DEFAULT_LINEALIGN
   CONFIG_SYS_VCXK_DOUBLEBUFFERED
   CONFIG_SYS_VCXK_ENABLE_DDR
   CONFIG_SYS_VCXK_ENABLE_PIN
   CONFIG_SYS_VCXK_ENABLE_PORT
   CONFIG_SYS_VCXK_INVERT_DDR
   CONFIG_SYS_VCXK_INVERT_PIN
   CONFIG_SYS_VCXK_INVERT_PORT
   CONFIG_SYS_VCXK_REQUEST_DDR
   CONFIG_SYS_VCXK_REQUEST_PIN
   CONFIG_SYS_VCXK_REQUEST_PORT
   CONFIG_SYS_VSC7385_BR_PRELIM
   CONFIG_SYS_VSC7385_OR_PRELIM

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index c11018d732943a6e1e3e4dbb6c90aa8adde50c8d..85ac5eb28138356c4d75916027b23b4852557dce 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -35,7 +35,6 @@
 #define CONFIG_SYS_XHCI_USB3_ADDR              (CONFIG_SYS_IMMR + 0x02100000)
 #define CONFIG_SYS_PCIE1_ADDR                  (CONFIG_SYS_IMMR + 0x2400000)
 #define CONFIG_SYS_PCIE2_ADDR                  (CONFIG_SYS_IMMR + 0x2500000)
-#define CONFIG_SYS_PCIE3_ADDR                  (CONFIG_SYS_IMMR + 0x2600000)
 #define CONFIG_SYS_SEC_MON_ADDR                        (CONFIG_SYS_IMMR + 0xe90000)
 #define CONFIG_SYS_SFP_ADDR                    (CONFIG_SYS_IMMR + 0xe80200)
 
@@ -56,9 +55,7 @@
 #define CONFIG_SYS_QMAN_MEM_BASE       0x500000000
 #define CONFIG_SYS_QMAN_MEM_PHYS       CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_MEM_SIZE       0x08000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x10000
 #define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x10000
-#define CONFIG_SYS_QMAN_CENA_BASE       CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_CENA_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
 #define CONFIG_SYS_QMAN_CINH_BASE       (CONFIG_SYS_QMAN_MEM_BASE + \
                                        CONFIG_SYS_QMAN_CENA_SIZE)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index a4e971ebbd70695664a2357f6286b66fb3966157..59488a04e409aeb45d2176ed249c5186da84c5fb 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -194,8 +194,6 @@
 /* PCIe */
 #define CONFIG_SYS_PCIE1_ADDR                  (CONFIG_SYS_IMMR + 0x2400000)
 #define CONFIG_SYS_PCIE2_ADDR                  (CONFIG_SYS_IMMR + 0x2500000)
-#define CONFIG_SYS_PCIE3_ADDR                  (CONFIG_SYS_IMMR + 0x2600000)
-#define CONFIG_SYS_PCIE4_ADDR                  (CONFIG_SYS_IMMR + 0x2700000)
 #if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
 #define SYS_PCIE5_ADDR                         (CONFIG_SYS_IMMR + 0x2800000)
 #define SYS_PCIE6_ADDR                         (CONFIG_SYS_IMMR + 0x2900000)

diff --git a/arch/arm/mach-rmobile/include/mach/r8a7790.h b/arch/arm/mach-rmobile/include/mach/r8a7790.h
index ef74d59fed445de19a82c322d84de94119a4abea..28669e3c7717e71d147e9a351ff3a0bf2766169d 100644 (file)
--- a/arch/arm/mach-rmobile/include/mach/r8a7790.h
+++ b/arch/arm/mach-rmobile/include/mach/r8a7790.h
@@ -24,9 +24,6 @@
 #define MSTP11_BITS    0x00000000
 
 /* SDHI */
-#define CONFIG_SYS_SH_SDHI1_BASE 0xEE120000
-#define CONFIG_SYS_SH_SDHI2_BASE 0xEE140000
-#define CONFIG_SYS_SH_SDHI3_BASE 0xEE160000
 #define CONFIG_SYS_SH_SDHI_NR_CHANNEL 4
 
 #define R8A7790_CUT_ES2X       2

diff --git a/arch/arm/mach-rmobile/include/mach/r8a7791.h b/arch/arm/mach-rmobile/include/mach/r8a7791.h
index 681d1ea524b3d441c3af65d44ba79e38da5c1611..37d134c5bf29b4279d0ceb04e4e6561811e40f09 100644 (file)
--- a/arch/arm/mach-rmobile/include/mach/r8a7791.h
+++ b/arch/arm/mach-rmobile/include/mach/r8a7791.h
@@ -14,8 +14,6 @@
  */
 
 /* SDHI */
-#define CONFIG_SYS_SH_SDHI1_BASE 0xEE140000
-#define CONFIG_SYS_SH_SDHI2_BASE 0xEE160000
 #define CONFIG_SYS_SH_SDHI_NR_CHANNEL 3
 
 #define DBSC3_1_QOS_R0_BASE    0xE67A1000

diff --git a/arch/arm/mach-rmobile/include/mach/r8a7793.h b/arch/arm/mach-rmobile/include/mach/r8a7793.h
index 31433c369300c48851f2c8254caf3e3412bd0bd0..85f59d9771251b13b2800c4de56d96ec112f870c 100644 (file)
--- a/arch/arm/mach-rmobile/include/mach/r8a7793.h
+++ b/arch/arm/mach-rmobile/include/mach/r8a7793.h
@@ -15,8 +15,6 @@
  */
 
 /* SDHI */
-#define CONFIG_SYS_SH_SDHI1_BASE 0xEE140000
-#define CONFIG_SYS_SH_SDHI2_BASE 0xEE160000
 #define CONFIG_SYS_SH_SDHI_NR_CHANNEL 3
 
 #define DBSC3_1_QOS_R0_BASE    0xE67A1000

diff --git a/arch/arm/mach-rmobile/include/mach/r8a7794.h b/arch/arm/mach-rmobile/include/mach/r8a7794.h
index 3baa4237c262a99d5131860b45133bbbcf41f306..2bd6e469c815322136a68ffb4a2dc1551c6f051c 100644 (file)
--- a/arch/arm/mach-rmobile/include/mach/r8a7794.h
+++ b/arch/arm/mach-rmobile/include/mach/r8a7794.h
@@ -24,8 +24,6 @@
 #define MSTP11_BITS    0x000001C0
 
 /* SDHI */
-#define CONFIG_SYS_SH_SDHI1_BASE 0xEE140000
-#define CONFIG_SYS_SH_SDHI2_BASE 0xEE160000
 #define CONFIG_SYS_SH_SDHI_NR_CHANNEL 3
 
 #define R8A7794_CUT_ES2                2

diff --git a/arch/arm/mach-rmobile/include/mach/rcar-base.h b/arch/arm/mach-rmobile/include/mach/rcar-base.h
index 4c98dffa073c180a65087b6cd3468c8a686c5215..e422e9100a8b6b31133aadd735307d7e32b82d96 100644 (file)
--- a/arch/arm/mach-rmobile/include/mach/rcar-base.h
+++ b/arch/arm/mach-rmobile/include/mach/rcar-base.h
@@ -70,15 +70,6 @@
 #define SMSTPCR10              0xE6150998
 #define SMSTPCR11              0xE615099C
 
-/* RCAR-I2C */
-#define CONFIG_SYS_RCAR_I2C0_BASE      0xE6508000
-#define CONFIG_SYS_RCAR_I2C1_BASE      0xE6518000
-#define CONFIG_SYS_RCAR_I2C2_BASE      0xE6530000
-#define CONFIG_SYS_RCAR_I2C3_BASE      0xE6540000
-
-/* SDHI */
-#define CONFIG_SYS_SH_SDHI0_BASE       0xEE100000
-
 #define S3C_BASE               0xE6784000
 #define S3C_INT_BASE           0xE6784A00
 #define S3C_MEDIA_BASE         0xE6784B00

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index c9ced5474c2c6f642be70646cdd2f212b646b235..78c0d05496551a32df55ed1efa305a38c318e594 100644 (file)
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2662,18 +2662,10 @@ struct ccsr_pman {
 #define CONFIG_SYS_PAMU_ADDR \
        (CONFIG_SYS_IMMR + CFG_SYS_FSL_PAMU_OFFSET)
 
-#define CONFIG_SYS_PCI1_ADDR \
-       (CONFIG_SYS_IMMR + CFG_SYS_MPC85xx_PCI1_OFFSET)
-#define CONFIG_SYS_PCI2_ADDR \
-       (CONFIG_SYS_IMMR + CFG_SYS_MPC85xx_PCI2_OFFSET)
 #define CONFIG_SYS_PCIE1_ADDR \
        (CONFIG_SYS_IMMR + CFG_SYS_MPC85xx_PCIE1_OFFSET)
 #define CONFIG_SYS_PCIE2_ADDR \
        (CONFIG_SYS_IMMR + CFG_SYS_MPC85xx_PCIE2_OFFSET)
-#define CONFIG_SYS_PCIE3_ADDR \
-       (CONFIG_SYS_IMMR + CFG_SYS_MPC85xx_PCIE3_OFFSET)
-#define CONFIG_SYS_PCIE4_ADDR \
-       (CONFIG_SYS_IMMR + CFG_SYS_MPC85xx_PCIE4_OFFSET)
 
 #define CONFIG_SYS_SFP_ADDR  \
        (CONFIG_SYS_IMMR + CONFIG_SYS_SFP_OFFSET)

diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index e191dc615bc27c748793c74d2838583a3afb7439..925d26eaf10dd8661fb119e58ae0f20796f12261 100644 (file)
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -130,13 +130,7 @@
 #define CONFIG_SYS_PBDDR               0x0000000
 #define CONFIG_SYS_PBDAT               0x0000000
 
-#define CONFIG_SYS_PCCNT               0x0000000       /* Port C D[15:08] */
-#define CONFIG_SYS_PCDDR               0x0000000
-#define CONFIG_SYS_PCDAT               0x0000000
-
 #define CONFIG_SYS_PDCNT               0x0000000       /* Port D D[07:00] */
-#define CONFIG_SYS_PCDDR               0x0000000
-#define CONFIG_SYS_PCDAT               0x0000000
 
 #define CONFIG_SYS_PEHLPAR             0xC0
 #define CONFIG_SYS_PUAPAR              0x0F    /* UA0..UA3 = Uart 0 +1 */

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index bde8fa8df4dd19691242bf98990de18a8de3b98d..c29e63c54ed898e66b68af5d6d9d313fe069c213 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -256,21 +256,16 @@
  */
 #define CONFIG_SYS_PCI1_MEM_VIRT       0x80000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCI1_MEM_BUS                0xe0000000
 #define CONFIG_SYS_PCI1_MEM_PHYS       0xc00000000ull
 #else
-#define CONFIG_SYS_PCI1_MEM_BUS        0x80000000
 #define CONFIG_SYS_PCI1_MEM_PHYS       0x80000000
 #endif
-#define CONFIG_SYS_PCI1_MEM_SIZE       0x20000000      /* 512M */
 #define CONFIG_SYS_PCI1_IO_VIRT        0xe2000000
-#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
 #ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCI1_IO_PHYS 0xfe2000000ull
 #else
 #define CONFIG_SYS_PCI1_IO_PHYS        0xe2000000
 #endif
-#define CONFIG_SYS_PCI1_IO_SIZE        0x00100000      /* 1M */
 
 #ifdef CONFIG_PCIE1
 #define CONFIG_SYS_PCIE1_MEM_VIRT      0xa0000000

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 6b83b021f77ebeef7fd00bc021fb6d11d9094d68..c83298107869973bdd61a332f02caabf73e2c1c2 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -248,8 +248,6 @@
 /* controller 3, Slot 1, tgtid 1, Base address 202000 */
 #define CONFIG_SYS_PCIE3_MEM_VIRT      0xc0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0xc40000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT       0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS       0xff8020000ull
 
 /* Qman/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS    10
@@ -276,9 +274,7 @@
 #define CONFIG_SYS_QMAN_MEM_PHYS       CONFIG_SYS_QMAN_MEM_BASE
 #endif
 #define CONFIG_SYS_QMAN_MEM_SIZE       0x00200000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x4000
 #define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE       CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_CENA_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
 #define CONFIG_SYS_QMAN_CINH_BASE       (CONFIG_SYS_QMAN_MEM_BASE + \
                                        CONFIG_SYS_QMAN_CENA_SIZE)

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index c4fed68273b5ac803230d69d3dc5809a21043f9a..e21639a6951bcd0251325b27ad254e7aab6dd6ef 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -349,8 +349,6 @@
 #ifdef CONFIG_PCIE3
 #define CONFIG_SYS_PCIE3_MEM_VIRT      0xa0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0xc20000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT       0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS       0xff8020000ull
 #endif
 #endif /* CONFIG_PCI */
 
@@ -391,9 +389,7 @@
 #define CONFIG_SYS_QMAN_MEM_PHYS       CONFIG_SYS_QMAN_MEM_BASE
 #endif
 #define CONFIG_SYS_QMAN_MEM_SIZE       0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x4000
 #define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE       CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_CENA_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
 #define CONFIG_SYS_QMAN_CINH_BASE       (CONFIG_SYS_QMAN_MEM_BASE + \
                                        CONFIG_SYS_QMAN_CENA_SIZE)

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 1eec94542100ccdf918b19b766bfb72231958e59..a3d04882f0d6f54fb12bf8cc495c9dfcee10c701 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -325,16 +325,12 @@
 #ifdef CONFIG_PCIE3
 #define CONFIG_SYS_PCIE3_MEM_VIRT      0xa0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0xc20000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT       0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS       0xff8020000ull
 #endif
 
 /* controller 4, Base address 203000 */
 #ifdef CONFIG_PCIE4
 #define CONFIG_SYS_PCIE4_MEM_VIRT      0xb0000000
 #define CONFIG_SYS_PCIE4_MEM_PHYS      0xc30000000ull
-#define CONFIG_SYS_PCIE4_IO_VIRT       0xf8030000
-#define CONFIG_SYS_PCIE4_IO_PHYS       0xff8030000ull
 #endif
 #endif /* CONFIG_PCI */
 
@@ -364,9 +360,7 @@
 #define CONFIG_SYS_QMAN_MEM_BASE       0xf6000000
 #define CONFIG_SYS_QMAN_MEM_PHYS       0xff6000000ull
 #define CONFIG_SYS_QMAN_MEM_SIZE       0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x4000
 #define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE       CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_CENA_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
 #define CONFIG_SYS_QMAN_CINH_BASE       (CONFIG_SYS_QMAN_MEM_BASE + \
                                        CONFIG_SYS_QMAN_CENA_SIZE)

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 42a0926329e937c208096dec51e497152c0951cf..72052be78a92ce6c3ef7888cc6b057b06aff8fb7 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -359,13 +359,10 @@
 /* controller 3, Slot 1, tgtid 1, Base address 202000 */
 #define CONFIG_SYS_PCIE3_MEM_VIRT      0xb0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0xc30000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT       0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS       0xff8020000ull
 
 /* controller 4, Base address 203000 */
 #define CONFIG_SYS_PCIE4_MEM_VIRT       0xc0000000
 #define CONFIG_SYS_PCIE4_MEM_PHYS      0xc40000000ull
-#define CONFIG_SYS_PCIE4_IO_PHYS       0xff8030000ull
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
@@ -385,9 +382,7 @@
 #define CONFIG_SYS_QMAN_MEM_BASE       0xf6000000
 #define CONFIG_SYS_QMAN_MEM_PHYS       0xff6000000ull
 #define CONFIG_SYS_QMAN_MEM_SIZE       0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x4000
 #define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE       CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_CENA_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
 #define CONFIG_SYS_QMAN_CINH_BASE       (CONFIG_SYS_QMAN_MEM_BASE + \
                                        CONFIG_SYS_QMAN_CENA_SIZE)

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 941efdc243f8f24987ff698f80e7468a854c3db1..c798e4487a4d0bacebef21cfe220868f648379b7 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -313,13 +313,10 @@
 /* controller 3, Slot 1, tgtid 1, Base address 202000 */
 #define CONFIG_SYS_PCIE3_MEM_VIRT      0xb0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0xc30000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT       0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS       0xff8020000ull
 
 /* controller 4, Base address 203000 */
 #define CONFIG_SYS_PCIE4_MEM_VIRT       0xc0000000
 #define CONFIG_SYS_PCIE4_MEM_PHYS      0xc40000000ull
-#define CONFIG_SYS_PCIE4_IO_PHYS       0xff8030000ull
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
@@ -339,9 +336,7 @@
 #define CONFIG_SYS_QMAN_MEM_BASE       0xf6000000
 #define CONFIG_SYS_QMAN_MEM_PHYS       0xff6000000ull
 #define CONFIG_SYS_QMAN_MEM_SIZE       0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x4000
 #define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE       CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_CENA_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
 #define CONFIG_SYS_QMAN_CINH_BASE       (CONFIG_SYS_QMAN_MEM_BASE + \
                                        CONFIG_SYS_QMAN_CENA_SIZE)

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 5969854796ec428b86845fa62b7b3b3d3de77fdb..5777df8e5076b112321769c3edb399e4d9d87830 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -121,13 +121,10 @@
 /* controller 3, Slot 1, tgtid 1, Base address 202000 */
 #define CONFIG_SYS_PCIE3_MEM_VIRT      0xc0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0xc40000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT       0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS       0xff8020000ull
 
 /* controller 4, Base address 203000 */
 #define CONFIG_SYS_PCIE4_MEM_BUS       0xe0000000
 #define CONFIG_SYS_PCIE4_MEM_PHYS      0xc60000000ull
-#define CONFIG_SYS_PCIE4_IO_PHYS       0xff8030000ull
 
 /*
  * Miscellaneous configurable options
@@ -337,9 +334,7 @@
 #define CONFIG_SYS_QMAN_MEM_BASE       0xf6000000
 #define CONFIG_SYS_QMAN_MEM_PHYS       0xff6000000ull
 #define CONFIG_SYS_QMAN_MEM_SIZE       0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x4000
 #define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE       CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_CENA_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
 #define CONFIG_SYS_QMAN_CINH_BASE       (CONFIG_SYS_QMAN_MEM_BASE + \
                                        CONFIG_SYS_QMAN_CENA_SIZE)

diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h
index 1f2b3b58ca69394397c69733457524f60361e626..35e8840a92a0fda3377fc8e783d89707b7664a19 100644 (file)
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -30,8 +30,6 @@
 
 #define CONFIG_FEC_MXC_PHYADDR         0
 
-#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-
 #ifdef CONFIG_IMX_HAB
 #define HAB_EXTRA_SETTINGS \
        "hab_check_addr=" \

diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index aaa2ef039d947295829ad285e917016e0328043d..80a820c913b7bc7f2ae64324a56b3d361d0e6b54 100644 (file)
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -137,13 +137,7 @@
 #define CONFIG_SYS_PBDDR               0x0000000
 #define CONFIG_SYS_PBDAT               0x0000000
 
-#define CONFIG_SYS_PCCNT               0x0000000       /* Port C D[15:08] */
-#define CONFIG_SYS_PCDDR               0x0000000
-#define CONFIG_SYS_PCDAT               0x0000000
-
 #define CONFIG_SYS_PDCNT               0x0000000       /* Port D D[07:00] */
-#define CONFIG_SYS_PCDDR               0x0000000
-#define CONFIG_SYS_PCDAT               0x0000000
 
 #define CONFIG_SYS_PASPAR              0x0F0F
 #define CONFIG_SYS_PEHLPAR             0xC0
@@ -160,29 +154,5 @@
 #define CONFIG_I2C_RTC_ADDR            0x68
 #endif
 
-/*-----------------------------------------------------------------------
- * VIDEO configuration
- */
-
-#define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN      2
-#define        CONFIG_SYS_VCXK_DOUBLEBUFFERED          1
-#define CONFIG_SYS_VCXK_BASE                   CONFIG_SYS_CS2_BASE
-
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT       MCFGPTB_GPTPORT
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR                MCFGPTB_GPTDDR
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN                0x0001
-
-#define CONFIG_SYS_VCXK_ENABLE_PORT            MCFGPTB_GPTPORT
-#define CONFIG_SYS_VCXK_ENABLE_DDR             MCFGPTB_GPTDDR
-#define CONFIG_SYS_VCXK_ENABLE_PIN             0x0002
-
-#define CONFIG_SYS_VCXK_REQUEST_PORT           MCFGPTB_GPTPORT
-#define CONFIG_SYS_VCXK_REQUEST_DDR            MCFGPTB_GPTDDR
-#define CONFIG_SYS_VCXK_REQUEST_PIN            0x0004
-
-#define CONFIG_SYS_VCXK_INVERT_PORT            MCFGPIO_PORTE
-#define CONFIG_SYS_VCXK_INVERT_DDR             MCFGPIO_DDRE
-#define CONFIG_SYS_VCXK_INVERT_PIN             MCFGPIO_PORT2
-
 #endif /* _CONFIG_M5282EVB_H */
 /*---------------------------------------------------------------------*/

diff --git a/include/configs/highbank.h b/include/configs/highbank.h
index 5e2b50bbac10c69e29c4fbe2224c4cbf269a5ae9..a7d21a76dba5684c071fae560c755803ee7ee685 100644 (file)
--- a/include/configs/highbank.h
+++ b/include/configs/highbank.h
@@ -14,11 +14,6 @@
  * Miscellaneous configurable options
  */
 
-/* Environment data setup
-*/
-#define CONFIG_SYS_NVRAM_BASE_ADDR     0xfff88000      /* NVRAM base address */
-#define CONFIG_SYS_NVRAM_SIZE          0x8000          /* NVRAM size */
-
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 
 #define CONFIG_EXTRA_ENV_SETTINGS                              \

diff --git a/include/configs/km/km-mpc8360.h b/include/configs/km/km-mpc8360.h
index 92e046d02d726f7b396bad73304e7f32bfaf78bc..fb43fb81bc077c1572f8aa594c31737dc5f2c540 100644 (file)
--- a/include/configs/km/km-mpc8360.h
+++ b/include/configs/km/km-mpc8360.h
@@ -72,4 +72,3 @@
  * PAXE on the local bus CS3
  */
 #define CONFIG_SYS_PAXE_BASE           0xA0000000
-#define CONFIG_SYS_PAXE_SIZE           256

diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h
index ab0d0a721af1f15c4942d5c3a9d58cf8c1566496..7d36a25dc232e0ce2f5e7036a2136cb4055a38b3 100644 (file)
--- a/include/configs/km/km-mpc83xx.h
+++ b/include/configs/km/km-mpc83xx.h
@@ -8,7 +8,6 @@
  * DDR Setup
  */
 #define CONFIG_SYS_SDRAM_BASE          0x00000000 /* DDR is system memory */
-#define CONFIG_SYS_SDRAM_BASE2 (CONFIG_SYS_SDRAM_BASE + 0x10000000) /* +256M */
 
 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL  (DDR_SDRAM_CLK_CNTL_SS_EN | \
                                        DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)

diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index f0248e646462445f33daa185e42dfc0a6ce3dca6..196e024b57e0bc841aa363756faa5a989eda6fbe 100644 (file)
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -11,10 +11,6 @@
 /* DDR */
 #define CONFIG_SYS_SDRAM_SIZE          0x40000000
 
-/* SATA */
-
-#define CONFIG_SYS_SATA                                AHCI_BASE_ADDR
-
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #define CONFIG_EXTRA_ENV_SETTINGS              \
        "verify=no\0"                           \

diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index b57eb52d148817541a7808929fa271d61b6b83cd..809f9ae8c8dc010424005d8c24a5201acd6b6c43 100644 (file)
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -18,10 +18,6 @@
 /*SPI device */
 #define CFG_SYS_FSL_QSPI_BASE  0x40000000
 
-/* SATA */
-
-#define CONFIG_SYS_SATA                                AHCI_BASE_ADDR
-
 /* I2C */
 
 /* GPIO */

diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 3b51cb8f174a3319917cf1a4116b11a25f8b7002..87751f786c8b0c9461e12a95dd1cae3820188e67 100644 (file)
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -35,10 +35,6 @@
 #define QSGMII_CARD_PORT4_PHY_ADDR_S2 0xB
 #endif
 
-/* SATA */
-
-#define CONFIG_SYS_SATA                                AHCI_BASE_ADDR
-
 /*
  * IFC Definitions
  */

diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 8a3c87c6abdbe38c0d2e6b6e01692edbfc63ddfa..3934fbbb41d1dc3781c2e22f50a3b9bbba3df8a3 100644 (file)
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -65,11 +65,6 @@
 
 /* I2C */
 
-/* SATA */
-#ifndef SPL_NO_SATA
-#define CONFIG_SYS_SATA                                AHCI_BASE_ADDR
-#endif
-
 /* FMan ucode */
 #ifndef SPL_NO_FMAN
 #define CONFIG_SYS_DPAA_FMAN

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 9fc22f0a6cbce993c52d35ec9aebf275c2a09a44..44e608536fe82deaad508e6bd9b3005701f2b75e 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -279,12 +279,6 @@
 #define CONFIG_SYS_VSC7385_BASE_PHYS   CONFIG_SYS_VSC7385_BASE
 #endif
 
-#define CONFIG_SYS_VSC7385_BR_PRELIM   \
-       (BR_PHYS_ADDR(CONFIG_SYS_VSC7385_BASE_PHYS) | BR_PS_8 | BR_V)
-#define CONFIG_SYS_VSC7385_OR_PRELIM   (OR_AM_128KB | OR_GPCM_CSNT | \
-                       OR_GPCM_XACS |  OR_GPCM_SCY_15 | OR_GPCM_SETA | \
-                       OR_GPCM_TRLX |  OR_GPCM_EHTR | OR_GPCM_EAD)
-
 /* The size of the VSC7385 firmware image */
 #define CONFIG_VSC7385_IMAGE_SIZE      8192
 #endif

diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h
index c5817b010f8a4876ac0c45417776f0d928137780..43a60825b57529dfecd7c0512802e6573e690536 100644 (file)
--- a/include/configs/phycore_am335x_r2.h
+++ b/include/configs/phycore_am335x_r2.h
@@ -97,10 +97,4 @@
 
 #endif /* !CONFIG_MTD_RAW_NAND */
 
-/* CPU */
-
-#ifdef CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_SIZE     0x40000
-#endif
-
 #endif /* ! __CONFIG_PHYCORE_AM335x_R2_H */

diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index ac39e11a99e11d1f0371253ba2c6aaf28a127e04..406ee6282c5f70a839da9b7668466f3024dad8b3 100644 (file)
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -18,9 +18,4 @@
 #define CONFIG_SYS_FLASH_BASE          (0xA0000000)
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
 
-/*
- * SuperH Clock setting
- */
-#define        CONFIG_SYS_PLL_SETTLING_TIME    100/* in us */
-
 #endif /* __CONFIG_H */

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 388a4e42efb98b1f71f3045ea9d710d158877f68..9b106fc1c97ea06ed268e8f4936eff7a0e4849e9 100644 (file)
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -109,12 +109,8 @@
  * Memory space is mapped 1-1.
  */
 
-#define CONFIG_SYS_PCI1_MEM_BASE       0x80000000
-#define CONFIG_SYS_PCI1_MEM_PHYS       CONFIG_SYS_PCI1_MEM_BASE
-#define CONFIG_SYS_PCI1_MEM_SIZE       0x20000000      /* 512M                 */
-#define CONFIG_SYS_PCI1_IO_BASE        0xE2000000
-#define CONFIG_SYS_PCI1_IO_PHYS        CONFIG_SYS_PCI1_IO_BASE
-#define CONFIG_SYS_PCI1_IO_SIZE        0x01000000      /* 16M                  */
+#define CONFIG_SYS_PCI1_MEM_PHYS       0x80000000
+#define CONFIG_SYS_PCI1_IO_PHYS        0xE2000000
 
 #define CONFIG_TSEC1   1
 #define CONFIG_TSEC1_NAME      "TSEC0"

diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index 9614fe686f6b45b269c0ee38dedc827a541944f0..fc78077014b51c3763b9375f18e7ca83fcded67b 100644 (file)
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -84,8 +84,6 @@
 
 /* Defines for SPL */
 
-#define CONFIG_SYS_SPI_U_BOOT_SIZE     0x40000
-
 /*
  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  * 64 bytes before this address should be set aside for u-boot.img's

diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 119b4c0410c7549607b070d09d0c914b0b497c56..65abb187d96df65dfe0706faeb3e12a0e80b73d2 100644 (file)
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -46,11 +46,6 @@
 /* SPI Configuration */
 #define CONFIG_SYS_SPI_CLK             ks_clk_get_rate(KS2_CLK1_6)
 
-/* Network Configuration */
-#define CONFIG_SYS_SGMII_REFCLK_MHZ    312
-#define CONFIG_SYS_SGMII_LINERATE_MHZ  1250
-#define CONFIG_SYS_SGMII_RATESCALE     2
-
 /* Keystone net */
 #define CONFIG_KSNET_MAC_ID_BASE               KS2_MAC_ID_BASE_ADDR
 #define CONFIG_KSNET_NETCP_BASE                        KS2_NETCP_BASE