mx6: crm_regs: Fix CDCDR_SPDIF0_CLK_PODF mask and offset

According to the Reference Manual the 'spdif0_clk_podf' field of register
CCM_CDCDR corresponds to bits 22, 23 and 24, so fix the mask and offset
definitions accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 0fcef69768e792ce12642fca477b4bf9b58b033f..9afe788389d17662596492deb7ded18f91bee718 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -335,8 +335,8 @@ struct mxc_ccm_reg {
 #endif
 #define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK             (0x7 << 25)
 #define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET           25
-#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK             (0x7 << 19)
-#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET           19
+#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK             (0x7 << 22)
+#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET           22
 #define MXC_CCM_CDCDR_SPDIF0_CLK_SEL_MASK              (0x3 << 20)
 #define MXC_CCM_CDCDR_SPDIF0_CLK_SEL_OFFSET            20
 #define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK             (0x7 << 12)