mmc: fsl_esdhc fix register offset

Commit f022d36e8a4517b2a9d25ff2d75bd2459d0c68b1 introduces
error register offset.

Change the "char reserved3[59]" to "char reserved3[56]".

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index c5e270dd57df6ba67b4a4c71ff08b9d7705d375e..db4d25192383742263fe722050a3b747b556c8eb 100644 (file)
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -56,7 +56,7 @@ struct fsl_esdhc {
        uint    adsaddr;        /* ADMA system address register */
        char    reserved2[100]; /* reserved */
        uint    vendorspec;     /* Vendor Specific register */
-       char    reserved3[59];  /* reserved */
+       char    reserved3[56];  /* reserved */
        uint    hostver;        /* Host controller version register */
        char    reserved4[4];   /* reserved */
        uint    dmaerraddr;     /* DMA error address register */