else
hsdk_clk->map = hsdk_4xd_clk_map;
- hsdk_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index(dev, 0);
+ hsdk_clk->cgu_regs = devfdt_get_addr_index_ptr(dev, 0);
if (!hsdk_clk->cgu_regs)
return -EINVAL;
- hsdk_clk->creg_regs = (void __iomem *)devfdt_get_addr_index(dev, 1);
+ hsdk_clk->creg_regs = devfdt_get_addr_index_ptr(dev, 1);
if (!hsdk_clk->creg_regs)
return -EINVAL;
{
struct altera_gen5_sdram_plat *plat = dev_get_plat(dev);
- plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index(dev, 0);
+ plat->sdr = devfdt_get_addr_index_ptr(dev, 0);
if (!plat->sdr)
- return -ENODEV;
+ return -EINVAL;
return 0;
}
host->ioaddr = dev_read_addr_ptr(dev);
if (device_is_compatible(dev, "marvell,armada-3700-sdhci"))
- priv->pad_ctrl_reg = (void *)devfdt_get_addr_index(dev, 1);
+ priv->pad_ctrl_reg = devfdt_get_addr_index_ptr(dev, 1);
name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "marvell,pad-type",
NULL);
}
/* Save base addresses for later use */
- priv->base = (void *)devfdt_get_addr_index(dev, 0);
- if (IS_ERR(priv->base))
- return PTR_ERR(priv->base);
+ priv->base = devfdt_get_addr_index_ptr(dev, 0);
+ if (!priv->base)
+ return -EINVAL;
if (priv->hw_version == MVPP21) {
- priv->lms_base = (void *)devfdt_get_addr_index(dev, 1);
- if (IS_ERR(priv->lms_base))
- return PTR_ERR(priv->lms_base);
+ priv->lms_base = devfdt_get_addr_index_ptr(dev, 1);
+ if (!priv->lms_base)
+ return -EINVAL;
} else {
- priv->iface_base = (void *)devfdt_get_addr_index(dev, 1);
- if (IS_ERR(priv->iface_base))
- return PTR_ERR(priv->iface_base);
+ priv->iface_base = devfdt_get_addr_index_ptr(dev, 1);
+ if (!priv->iface_base)
+ return -EINVAL;
/* Store common base addresses for all ports */
priv->mpcs_base = priv->iface_base + MVPP22_MPCS;
if (priv->hw_version == MVPP21) {
int priv_common_regs_num = 2;
- port->base = (void __iomem *)devfdt_get_addr_index(
+ port->base = devfdt_get_addr_index_ptr(
dev->parent, priv_common_regs_num + port->id);
- if (IS_ERR(port->base))
- return PTR_ERR(port->base);
+ if (!port->base)
+ return -EINVAL;
} else {
port->gop_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"gop-port-id", -1);
struct pcie_dw_mvebu *pcie = dev_get_priv(dev);
/* Get the controller base address */
- pcie->ctrl_base = (void *)devfdt_get_addr_index(dev, 0);
- if ((fdt_addr_t)pcie->ctrl_base == FDT_ADDR_T_NONE)
+ pcie->ctrl_base = devfdt_get_addr_index_ptr(dev, 0);
+ if (!pcie->ctrl_base)
return -EINVAL;
/* Get the config space base address and size */
{
struct imx_pcie_priv *priv = dev_get_priv(dev);
- priv->dbi_base = (void __iomem *)devfdt_get_addr_index(dev, 0);
- priv->cfg_base = (void __iomem *)devfdt_get_addr_index(dev, 1);
+ priv->dbi_base = devfdt_get_addr_index_ptr(dev, 0);
+ priv->cfg_base = devfdt_get_addr_index_ptr(dev, 1);
if (!priv->dbi_base || !priv->cfg_base)
return -EINVAL;
pcie_ep->pcie = pcie;
- pcie->dbi = (void __iomem *)devfdt_get_addr_index(dev, 0);
+ pcie->dbi = devfdt_get_addr_index_ptr(dev, 0);
if (!pcie->dbi)
- return -ENOMEM;
+ return -EINVAL;
- pcie->ctrl = (void __iomem *)devfdt_get_addr_index(dev, 1);
+ pcie->ctrl = devfdt_get_addr_index_ptr(dev, 1);
if (!pcie->ctrl)
- return -ENOMEM;
+ return -EINVAL;
ret = fdt_get_named_resource(gd->fdt_blob, dev_of_offset(dev),
"reg", "reg-names",
int res;
/* Save base addresses for later use */
- chip_cfg->comphy_base_addr = (void *)devfdt_get_addr_index(dev, 0);
- if (IS_ERR(chip_cfg->comphy_base_addr))
- return PTR_ERR(chip_cfg->comphy_base_addr);
+ chip_cfg->comphy_base_addr = devfdt_get_addr_index_ptr(dev, 0);
+ if (!chip_cfg->comphy_base_addr)
+ return -EINVAL;
- chip_cfg->hpipe3_base_addr = (void *)devfdt_get_addr_index(dev, 1);
- if (IS_ERR(chip_cfg->hpipe3_base_addr))
- return PTR_ERR(chip_cfg->hpipe3_base_addr);
+ chip_cfg->hpipe3_base_addr = devfdt_get_addr_index_ptr(dev, 1);
+ if (!chip_cfg->hpipe3_base_addr)
+ return -EINVAL;
if (device_is_compatible(dev, "marvell,comphy-a3700")) {
chip_cfg->comphy_init_map = comphy_a3700_init_serdes_map;
struct cadence_spi_priv *priv = dev_get_priv(bus);
ofnode subnode;
- plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
+ plat->regbase = devfdt_get_addr_index_ptr(bus, 0);
plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize);
plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");
plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);
int usb_index;
struct musb_hdrc_config *musb_config;
- plat->base = (void *)devfdt_get_addr_index(dev, 1);
+ plat->base = devfdt_get_addr_index_ptr(dev, 1);
phys = fdtdec_lookup_phandle(fdt, node, "phys");
ctrl_mod = fdtdec_lookup_phandle(fdt, phys, "ti,ctrl_mod");