]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
km/ppc: migrate all mpc83xx to DM_I2C
authorHolger Brunck <holger.brunck@hitachienergy.com>
Fri, 2 Dec 2022 17:22:42 +0000 (18:22 +0100)
committerTom Rini <trini@konsulko.com>
Mon, 12 Dec 2022 21:49:54 +0000 (16:49 -0500)
Enable DM_I2C and I2C mux to get rid of the usage of the legacy
i2c driver.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
board/keymile/Kconfig
board/keymile/km83xx/Makefile
board/keymile/km83xx/km83xx_i2c.c [deleted file]
configs/kmcoge5ne_defconfig
configs/kmeter1_defconfig
configs/kmopti2_defconfig
configs/kmsupx5_defconfig
configs/kmtepr2_defconfig
configs/tuge1_defconfig
configs/tuxx1_defconfig
include/configs/km/km-mpc83xx.h

index cd8a06e278020d2322c841cdd60be9834ff1a3b5..e5d7c80a869dff2f5a860d048123cae14fc2a632 100644 (file)
@@ -100,8 +100,7 @@ config KM_MVEXTSW_ADDR
 config KM_IVM_BUS
        int "IVM I2C Bus"
        default 0 if ARCH_SOCFPGA
-       default 1 if MPC85xx || ARCH_LS1021A
-       default 2 if MPC83xx
+       default 1 if PPC || ARCH_LS1021A
        help
          Identifier number of I2C bus, where the inventory EEPROM is connected to.
 
index 0aef65498735592d86862c23b984303d7d7a999c..bdb358e2d2720288c607ec8f03ce810b848001e7 100644 (file)
@@ -3,4 +3,4 @@
 # (C) Copyright 2006
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 
-obj-y  += km83xx.o ../common/common.o ../common/ivm.o km83xx_i2c.o
+obj-y  += km83xx.o ../common/common.o ../common/ivm.o
diff --git a/board/keymile/km83xx/km83xx_i2c.c b/board/keymile/km83xx/km83xx_i2c.c
deleted file mode 100644 (file)
index b80672d..0000000
+++ /dev/null
@@ -1,73 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2011
- * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
- */
-
-#include <common.h>
-#include <i2c.h>
-#include <asm/io.h>
-#include <linux/ctype.h>
-#include <linux/delay.h>
-#include "../common/common.h"
-
-static void i2c_write_start_seq(void)
-{
-       struct fsl_i2c_base *base;
-       base = (struct fsl_i2c_base *)(CONFIG_SYS_IMMR +
-                       CONFIG_SYS_FSL_I2C_OFFSET);
-       udelay(DELAY_ABORT_SEQ);
-       out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA));
-       udelay(DELAY_ABORT_SEQ);
-       out_8(&base->cr, (I2C_CR_MEN));
-}
-
-int i2c_make_abort(void)
-{
-       struct fsl_i2c_base *base;
-       base = (struct fsl_i2c_base *)(CONFIG_SYS_IMMR +
-                       CONFIG_SYS_FSL_I2C_OFFSET);
-       uchar   last;
-       int     nbr_read = 0;
-       int     i = 0;
-       int         ret = 0;
-
-       /* wait after each operation to finsh with a delay */
-       out_8(&base->cr, (I2C_CR_MSTA));
-       udelay(DELAY_ABORT_SEQ);
-       out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA));
-       udelay(DELAY_ABORT_SEQ);
-       in_8(&base->dr);
-       udelay(DELAY_ABORT_SEQ);
-       last = in_8(&base->dr);
-       nbr_read++;
-
-       /*
-        * do read until the last bit is 1, but stop if the full eeprom is
-        * read.
-        */
-       while (((last & 0x01) != 0x01) &&
-               (nbr_read < CONFIG_SYS_IVM_EEPROM_MAX_LEN)) {
-               udelay(DELAY_ABORT_SEQ);
-               last = in_8(&base->dr);
-               nbr_read++;
-       }
-       if ((last & 0x01) != 0x01)
-               ret = -2;
-       if ((last != 0xff) || (nbr_read > 1))
-               printf("[INFO] i2c abort after %d bytes (0x%02x)\n",
-                       nbr_read, last);
-       udelay(DELAY_ABORT_SEQ);
-       out_8(&base->cr, (I2C_CR_MEN));
-       udelay(DELAY_ABORT_SEQ);
-       /* clear status reg */
-       out_8(&base->sr, 0);
-
-       for (i = 0; i < 5; i++)
-               i2c_write_start_seq();
-       if (ret != 0)
-               printf("[ERROR] i2c abort failed after %d bytes (0x%02x)\n",
-                       nbr_read, last);
-
-       return ret;
-}
index 6bfcee9ed2fd230f70271cfdb9baf4085552d477..9609f58fb4d79c8511399401cb34a8a7282c5a95 100644 (file)
@@ -219,13 +219,10 @@ CONFIG_SYS_OR3_PRELIM=0xF0000E25
 CONFIG_SYS_BR4_PRELIM_BOOL=y
 CONFIG_SYS_BR4_PRELIM=0xB0000801
 CONFIG_SYS_OR4_PRELIM=0xF0000E25
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y
-CONFIG_SYS_FSL_I2C_OFFSET=0x3000
-CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
-CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
-CONFIG_SYS_I2C_SLAVE=0x7F
-CONFIG_SYS_I2C_SPEED=200000
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
index b0af9e051bba6764fcd58d72ab5477274dc88bf7..bd3d6315b1f600a6e30e2d001cabab9a7fb72b7e 100644 (file)
@@ -185,13 +185,10 @@ CONFIG_SYS_OR1_PRELIM=0xFC000E25
 CONFIG_SYS_BR3_PRELIM_BOOL=y
 CONFIG_SYS_BR3_PRELIM=0xA0000801
 CONFIG_SYS_OR3_PRELIM=0xF0000E25
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y
-CONFIG_SYS_FSL_I2C_OFFSET=0x3000
-CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
-CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
-CONFIG_SYS_I2C_SLAVE=0x7F
-CONFIG_SYS_I2C_SPEED=200000
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
index 9a1e7cbde30f4a82ddd94c5fa45dea0cd1093503..de6d99e91ec2f5bb70416ea65be73379273ff3dd 100644 (file)
@@ -200,13 +200,10 @@ CONFIG_SYS_OR2_PRELIM=0xF0000C25
 CONFIG_SYS_BR3_PRELIM_BOOL=y
 CONFIG_SYS_BR3_PRELIM=0xB0001001
 CONFIG_SYS_OR3_PRELIM=0xF0000040
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y
-CONFIG_SYS_FSL_I2C_OFFSET=0x3000
-CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
-CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
-CONFIG_SYS_I2C_SLAVE=0x7F
-CONFIG_SYS_I2C_SPEED=200000
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
index d981e51223924f2acf6cc21a155b0bdefdb15749..a231510a76f59309c0e8a03a8c669701bf790d1d 100644 (file)
@@ -177,13 +177,10 @@ CONFIG_SYS_OR1_PRELIM=0xF8000E25
 CONFIG_SYS_BR2_PRELIM_BOOL=y
 CONFIG_SYS_BR2_PRELIM=0xA0000801
 CONFIG_SYS_OR2_PRELIM=0xF0000C25
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y
-CONFIG_SYS_FSL_I2C_OFFSET=0x3000
-CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
-CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
-CONFIG_SYS_I2C_SLAVE=0x7F
-CONFIG_SYS_I2C_SPEED=200000
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
index 18a464c0aeb5763dbc0770ff9c0e25013b93bfa1..e6beb62f862794bef612b107125b58e4a9fb244c 100644 (file)
@@ -199,13 +199,10 @@ CONFIG_SYS_OR2_PRELIM=0xF0000C25
 CONFIG_SYS_BR3_PRELIM_BOOL=y
 CONFIG_SYS_BR3_PRELIM=0xB0001001
 CONFIG_SYS_OR3_PRELIM=0xF0000040
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y
-CONFIG_SYS_FSL_I2C_OFFSET=0x3000
-CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
-CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
-CONFIG_SYS_I2C_SLAVE=0x7F
-CONFIG_SYS_I2C_SPEED=200000
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
index dbd832c9b76dcd3401ebdc7b4f664d89010072f7..83120759b15ebf4b68f5ff02e59f350b373d3aa3 100644 (file)
@@ -177,13 +177,10 @@ CONFIG_SYS_OR1_PRELIM=0xF8000E25
 CONFIG_SYS_BR2_PRELIM_BOOL=y
 CONFIG_SYS_BR2_PRELIM=0xA0000801
 CONFIG_SYS_OR2_PRELIM=0xF0000C25
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y
-CONFIG_SYS_FSL_I2C_OFFSET=0x3000
-CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
-CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
-CONFIG_SYS_I2C_SLAVE=0x7F
-CONFIG_SYS_I2C_SPEED=200000
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
index 1b034a21a72648657b4485eddd64df443d965104..ee1640608d20be4c82e91fd853749d020b43ee5a 100644 (file)
@@ -201,13 +201,10 @@ CONFIG_SYS_OR2_PRELIM=0xF0000C25
 CONFIG_SYS_BR3_PRELIM_BOOL=y
 CONFIG_SYS_BR3_PRELIM=0xB0000801
 CONFIG_SYS_OR3_PRELIM=0xF0000E24
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y
-CONFIG_SYS_FSL_I2C_OFFSET=0x3000
-CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
-CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
-CONFIG_SYS_I2C_SLAVE=0x7F
-CONFIG_SYS_I2C_SPEED=200000
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
index 7f1839f463d099b9625df9077401ad6944121b59..1f03f95acefdc004e616b0b0345636697e23c671 100644 (file)
 
 #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE }
 
-/* I2C */
-#define CFG_SYS_NUM_I2C_BUSES  4
-#define CFG_SYS_I2C_MAX_HOPS           1
-#define CFG_SYS_I2C_BUSES      {{0, {I2C_NULL_HOP} }, \
-               {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
-               {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
-               {1, {I2C_NULL_HOP} } }
-
 #if defined(CONFIG_CMD_NAND)
 #define CFG_SYS_NAND_BASE              CFG_SYS_KMBEC_FPGA_BASE
 #endif