rockchip: arm64: rk3399: add SPL support

Add SPL support for rk3399, default with of-platdata enabled.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop Kconfig changes to fix build error:
Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 7b8abc22664f2843fa51e784899d7c56d1da47d4..151fa2d144a5abcab1f529b027d7ca4415337319 100644 (file)
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -11,6 +11,7 @@ else ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
+obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o
 obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
 else
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
new file mode 100644 (file)
index 0000000..8ae3055
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -0,0 +1,158 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <led.h>
+#include <malloc.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/timer.h>
+#include <dm/pinctrl.h>
+#include <dm/root.h>
+#include <dm/test.h>
+#include <dm/util.h>
+#include <power/regulator.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 spl_boot_device(void)
+{
+       return BOOT_DEVICE_MMC1;
+}
+
+u32 spl_boot_mode(const u32 boot_device)
+{
+       return MMCSD_MODE_RAW;
+}
+
+#define TIMER_CHN10_BASE       0xff8680a0
+#define TIMER_END_COUNT_L      0x00
+#define TIMER_END_COUNT_H      0x04
+#define TIMER_INIT_COUNT_L     0x10
+#define TIMER_INIT_COUNT_H     0x14
+#define TIMER_CONTROL_REG      0x1c
+
+#define TIMER_EN       0x1
+#define        TIMER_FMODE     (0 << 1)
+#define        TIMER_RMODE     (1 << 1)
+
+void secure_timer_init(void)
+{
+       writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
+       writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
+       writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
+       writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
+       writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
+}
+
+#define GRF_EMMCCORE_CON11 0xff77f02c
+void board_init_f(ulong dummy)
+{
+       struct udevice *pinctrl;
+       struct udevice *dev;
+       int ret;
+
+       /* Example code showing how to enable the debug UART on RK3288 */
+#include <asm/arch/grf_rk3399.h>
+       /* Enable early UART2 channel C on the RK3399 */
+#define GRF_BASE       0xff770000
+       struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
+
+       rk_clrsetreg(&grf->gpio4c_iomux,
+                    GRF_GPIO4C3_SEL_MASK,
+                    GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
+       rk_clrsetreg(&grf->gpio4c_iomux,
+                    GRF_GPIO4C4_SEL_MASK,
+                    GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
+       /* Set channel C as UART2 input */
+       rk_clrsetreg(&grf->soc_con7,
+                    GRF_UART_DBG_SEL_MASK,
+                    GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
+#define EARLY_UART
+#ifdef EARLY_UART
+       /*
+        * Debug UART can be used from here if required:
+        *
+        * debug_uart_init();
+        * printch('a');
+        * printhex8(0x1234);
+        * printascii("string");
+        */
+       debug_uart_init();
+       printascii("U-Boot SPL board init");
+#endif
+       /*  Emmc clock generator: disable the clock multipilier */
+       rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
+
+       ret = spl_init();
+       if (ret) {
+               debug("spl_init() failed: %d\n", ret);
+               hang();
+       }
+
+       secure_timer_init();
+
+       ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+       if (ret) {
+               debug("Pinctrl init failed: %d\n", ret);
+               return;
+       }
+
+       ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+       if (ret) {
+               debug("DRAM init failed: %d\n", ret);
+               return;
+       }
+}
+
+void spl_board_init(void)
+{
+       struct udevice *pinctrl;
+       int ret;
+
+       ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+       if (ret) {
+               debug("%s: Cannot find pinctrl device\n", __func__);
+               goto err;
+       }
+
+       /* Enable debug UART */
+       ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
+       if (ret) {
+               debug("%s: Failed to set up console UART\n", __func__);
+               goto err;
+       }
+
+       preloader_console_init();
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+       back_to_bootrom();
+#endif
+       return;
+err:
+       printf("spl_board_init: Error %d\n", ret);
+
+       /* No way to report error here */
+       hang();
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+       /* Just empty function now - can't decide what to choose */
+       debug("%s: %s\n", __func__, name);
+
+       return 0;
+}
+#endif

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index ce64476c2ecc309aa573a794d021f6a7675e749e..6921f68068e3400d1836f81255fbc6bdb9aff685 100644 (file)
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -22,6 +22,12 @@
 #define CONFIG_SYS_TEXT_BASE           0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR                0x00300000
 #define CONFIG_SYS_LOAD_ADDR           0x00800800
+#define CONFIG_SPL_STACK               0xff8effff
+#define CONFIG_SPL_TEXT_BASE           0xff8c2008
+#define CONFIG_SPL_MAX_SIZE            0x30000
+/*  BSS setup */
+#define CONFIG_SPL_BSS_START_ADDR       0xff8e0000
+#define CONFIG_SPL_BSS_MAX_SIZE         0x10000
 
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* 64M */