]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification
authorIra W. Snyder <iws@ovro.caltech.edu>
Mon, 21 Nov 2011 21:20:33 +0000 (13:20 -0800)
committerKumar Gala <galak@kernel.crashing.org>
Tue, 29 Nov 2011 14:48:06 +0000 (08:48 -0600)
Newer JEDEC DDR3 SPD Specifications define several additional values for
the DDR3 module_type field which were undefined when this code was
written. Update the code to handle the newer module types.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
include/ddr_spd.h

index ffb503a777aca52f7fe5177adf31263276c2f676..d0a546610ee727edc9abc8424a53c08c764d1c25 100644 (file)
@@ -135,6 +135,7 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd,
        switch (spd->module_type & DDR3_SPD_MODULETYPE_MASK) {
        case DDR3_SPD_MODULETYPE_RDIMM:
        case DDR3_SPD_MODULETYPE_MINI_RDIMM:
+       case DDR3_SPD_MODULETYPE_72B_SO_RDIMM:
                /* Registered/buffered DIMMs */
                pdimm->registered_dimm = 1;
                for (i = 0; i < 16; i += 2) {
@@ -148,6 +149,12 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd,
        case DDR3_SPD_MODULETYPE_SO_DIMM:
        case DDR3_SPD_MODULETYPE_MICRO_DIMM:
        case DDR3_SPD_MODULETYPE_MINI_UDIMM:
+       case DDR3_SPD_MODULETYPE_MINI_CDIMM:
+       case DDR3_SPD_MODULETYPE_72B_SO_UDIMM:
+       case DDR3_SPD_MODULETYPE_72B_SO_CDIMM:
+       case DDR3_SPD_MODULETYPE_LRDIMM:
+       case DDR3_SPD_MODULETYPE_16B_SO_DIMM:
+       case DDR3_SPD_MODULETYPE_32B_SO_DIMM:
                /* Unbuffered DIMMs */
                if (spd->mod_section.unbuffered.addr_mapping & 0x1)
                        pdimm->mirrored_dimm = 1;
index 40a04635600963b827c6420062f581b78aa4c696..a9230b9108ed46e3c3915bcb433279662ad86c40 100644 (file)
@@ -325,5 +325,12 @@ extern unsigned int ddr3_spd_check(const ddr3_spd_eeprom_t *spd);
 #define DDR3_SPD_MODULETYPE_MICRO_DIMM (0x04)
 #define DDR3_SPD_MODULETYPE_MINI_RDIMM (0x05)
 #define DDR3_SPD_MODULETYPE_MINI_UDIMM (0x06)
+#define DDR3_SPD_MODULETYPE_MINI_CDIMM (0x07)
+#define DDR3_SPD_MODULETYPE_72B_SO_UDIMM       (0x08)
+#define DDR3_SPD_MODULETYPE_72B_SO_RDIMM       (0x09)
+#define DDR3_SPD_MODULETYPE_72B_SO_CDIMM       (0x0A)
+#define DDR3_SPD_MODULETYPE_LRDIMM     (0x0B)
+#define DDR3_SPD_MODULETYPE_16B_SO_DIMM        (0x0C)
+#define DDR3_SPD_MODULETYPE_32B_SO_DIMM        (0x0D)
 
 #endif /* _DDR_SPD_H_ */