static u8 brdcode __section("data");
static u8 ddr3code __section("data");
static u8 somcode __section("data");
+static u32 opp_voltage_mv __section(".data");
static void board_get_coding_straps(void)
{
return -EINVAL;
}
+void board_vddcore_init(u32 voltage_mv)
+{
+ if (IS_ENABLED(CONFIG_SPL_BUILD))
+ opp_voltage_mv = voltage_mv;
+}
+
int board_early_init_f(void)
{
if (IS_ENABLED(CONFIG_SPL_BUILD))
- stpmic1_init();
+ stpmic1_init(opp_voltage_mv);
board_get_coding_straps();
return 0;
return 0;
}
+static int stmpic_buck1_set(struct udevice *dev, u32 voltage_mv)
+{
+ u32 value;
+
+ /* VDDCORE= STMPCI1 BUCK1 ramp=+25mV, 5 => 725mV, 36 => 1500mV */
+ value = ((voltage_mv - 725) / 25) + 5;
+ if (value < 5)
+ value = 5;
+ if (value > 36)
+ value = 36;
+
+ return pmic_clrsetbits(dev,
+ STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK1),
+ STPMIC1_BUCK_VOUT_MASK,
+ STPMIC1_BUCK_VOUT(value));
+}
+
/* early init of PMIC */
-void stpmic1_init(void)
+void stpmic1_init(u32 voltage_mv)
{
struct udevice *dev;
DM_GET_DRIVER(pmic_stpmic1), &dev))
return;
+ /* update VDDCORE = BUCK1 */
+ if (voltage_mv)
+ stmpic_buck1_set(dev, voltage_mv);
+
/* Keep vdd on during the reset cycle */
pmic_clrsetbits(dev,
STPMIC1_BUCKS_MRST_CR,
* Copyright (C) 2020, STMicroelectronics - All Rights Reserved
*/
-void stpmic1_init(void);
+void stpmic1_init(u32 voltage_mv);
#include <asm/arch/sys_proto.h>
#include "../common/stpmic1.h"
+/* board early initialisation in board_f: need to use global variable */
+static u32 opp_voltage_mv __section(".data");
+
+void board_vddcore_init(u32 voltage_mv)
+{
+ if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER_SUPPORT))
+ opp_voltage_mv = voltage_mv;
+}
+
int board_early_init_f(void)
{
if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER_SUPPORT))
- stpmic1_init();
+ stpmic1_init(opp_voltage_mv);
return 0;
}