rockchip: rk3568: Read cpuid from otp

The cpuid on RK3568 is located at 0xa instead of 0x7 as all other SoCs.
Add and use a CFG_CPUID_OFFSET to define this offset.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index 4e2d059fcf7d52775350eff33286a6eb4cba7bd2..23316410496d44928ed2347c438049981790a24a 100644 (file)
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -20,6 +20,18 @@
                u-boot,dm-pre-reloc;
                status = "okay";
        };
+
+       otp: nvmem@fe38c000 {
+               compatible = "rockchip,rk3568-otp";
+               reg = <0x0 0xfe38c000 0x0 0x4000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               status = "okay";
+
+               cpu_id: id@a {
+                       reg = <0x0a 0x10>;
+               };
+       };
 };
 
 &combphy1 {

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 26ba9deff8a5366d18a6f986d4704755475fbe54..88be06811c535d96f0fb506af428c27b4974f8e0 100644 (file)
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -289,6 +289,8 @@ config ROCKCHIP_RK3568
        select DM_REGULATOR_FIXED
        select DM_RESET
        imply ROCKCHIP_COMMON_BOARD
+       imply ROCKCHIP_OTP
+       imply MISC_INIT_R
        help
          The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
          including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index ebffb6c3ff0c5f9ba028f632596b990988b6650c..f1f70c81d0ca6585f43425ce4131994c5e194288 100644 (file)
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -323,7 +323,7 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
 #ifdef CONFIG_MISC_INIT_R
 __weak int misc_init_r(void)
 {
-       const u32 cpuid_offset = 0x7;
+       const u32 cpuid_offset = CFG_CPUID_OFFSET;
        const u32 cpuid_length = 0x10;
        u8 cpuid[cpuid_length];
        int ret;

diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index ae360105d508548f9b5f86cbc2ca99c691b9b159..a5e1dde508883cb55f07ab72d04716e0d59639ea 100644 (file)
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_RK3568_COMMON_H
 #define __CONFIG_RK3568_COMMON_H
 
+#define CFG_CPUID_OFFSET       0xa
+
 #include "rockchip-common.h"
 
 #define CFG_IRAM_BASE          0xfdcc0000

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index ff8123dabd69c4a414b33e2e40f473b9e35c7cbd..b7c5c6634394a27cf0b41e6df8595ae521fdbd63 100644 (file)
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -7,6 +7,10 @@
 #define _ROCKCHIP_COMMON_H_
 #include <linux/sizes.h>
 
+#ifndef CFG_CPUID_OFFSET
+#define CFG_CPUID_OFFSET       0x7
+#endif
+
 /* ((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512) */
 
 #ifndef CONFIG_SPL_BUILD