mips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM

This patch enables the usage of CONFIG_MIPS_L2_CACHE without
CONFIG_MIPS_CM, which is what is needed for the newly added Octeon
platform.

Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/arch/mips/include/asm/cm.h b/arch/mips/include/asm/cm.h
index 3878171607dc6a1e28687b4704a5086820eaff9c..99ddbccd808b52560c8e36fc09bd07cc395551de 100644 (file)
--- a/arch/mips/include/asm/cm.h
+++ b/arch/mips/include/asm/cm.h
@@ -41,6 +41,7 @@
 #include <asm/io.h>
 #include <linux/bitops.h>
 
+#if CONFIG_IS_ENABLED(MIPS_CM)
 static inline void *mips_cm_base(void)
 {
        return (void *)CKSEG1ADDR(CONFIG_MIPS_CM_BASE);
@@ -56,6 +57,17 @@ static inline unsigned long mips_cm_l2_line_size(void)
        line_sz &= GENMASK(GCR_L2_CONFIG_LINESZ_BITS - 1, 0);
        return line_sz ? (2 << line_sz) : 0;
 }
+#else
+static inline void *mips_cm_base(void)
+{
+       return NULL;
+}
+
+static inline unsigned long mips_cm_l2_line_size(void)
+{
+       return 0;
+}
+#endif
 
 #endif /* !__ASSEMBLY__ */
 

diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 24f115ebc97bf2a6a2de707f68e9b2b41676d365..b5c42aeed7893bdea65f7b82557413b52ab888b8 100644 (file)
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -8,9 +8,7 @@
 #include <cpu_func.h>
 #include <asm/cache.h>
 #include <asm/cacheops.h>
-#ifdef CONFIG_MIPS_L2_CACHE
 #include <asm/cm.h>
-#endif
 #include <asm/io.h>
 #include <asm/mipsregs.h>
 #include <asm/system.h>