]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
x86: coreboot: Convert to use DM coreboot video driver
authorBin Meng <bmeng.cn@gmail.com>
Sun, 9 Oct 2016 11:14:18 +0000 (04:14 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Wed, 12 Oct 2016 02:58:24 +0000 (10:58 +0800)
This converts coreboot to use DM framebuffer driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
12 files changed:
arch/x86/cpu/coreboot/Kconfig
arch/x86/dts/bayleybay.dts
arch/x86/dts/broadwell_som-6896.dts
arch/x86/dts/chromebook_link.dts
arch/x86/dts/chromebook_samus.dts
arch/x86/dts/chromebox_panther.dts
arch/x86/dts/coreboot_fb.dtsi [new file with mode: 0644]
arch/x86/dts/minnowmax.dts
configs/coreboot-x86_defconfig
doc/README.x86
drivers/video/Makefile
include/configs/som-6896.h

index e0e3c64506d80a63d01e18077a775a937f7834e0..4b3601f66d9d64544eb1457fb6624c140f386be8 100644 (file)
@@ -8,8 +8,4 @@ config CBMEM_CONSOLE
        bool
        default y
 
-config VIDEO_COREBOOT
-       bool
-       default y
-
 endif
index c8907ce44bcdcf7296db77ac7eb021441bf8997d..18b310d39e884224fa0d37eea61ca06e0d0f86d9 100644 (file)
@@ -14,6 +14,7 @@
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
 
 / {
        model = "Intel Bayley Bay";
index 4bb0a34b5f2bf814bc2b9e6580b91118f6ac5411..39661990853b32bea83095b2383cc9bdf602141b 100644 (file)
@@ -4,6 +4,7 @@
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
 
 / {
        model = "Advantech SOM-6896";
index fb1b31dc5e709fba60ed64a40127027e81ec5ab4..b93234046e0c60bc20c76ed8d99eba68d420c530 100644 (file)
@@ -7,6 +7,7 @@
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
 
 / {
        model = "Google Link";
index 5dd3e57cb9bfc0a0b754bd7e77d8aabbac2dd222..52a9ea66225a67a9077a46cfbf1fee67d3fa7326 100644 (file)
@@ -7,6 +7,7 @@
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
 
 / {
        model = "Google Samus";
index 480b36658ee921b162240d5658e03dfe59603f92..b25c9194f357b792cfd7772ec4f6178427f8622b 100644 (file)
@@ -4,6 +4,7 @@
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
 
 / {
        model = "Google Panther";
diff --git a/arch/x86/dts/coreboot_fb.dtsi b/arch/x86/dts/coreboot_fb.dtsi
new file mode 100644 (file)
index 0000000..7d72f18
--- /dev/null
@@ -0,0 +1,5 @@
+/ {
+       coreboot-fb {
+               compatible = "coreboot-fb";
+       };
+};
index 1a8a8cc7f1bb6c355922530fb81ddf88d6ea10b3..d51318bdf60757cf6ff4ad3026de4211fff2a1b4 100644 (file)
@@ -13,6 +13,7 @@
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
+/include/ "coreboot_fb.dtsi"
 
 / {
        model = "Intel Minnowboard Max";
index 378d75fb5002cc1a364628575783f98b4488c5ac..b33c5c4da809890af9d12dd3c23e5afbcc7980f1 100644 (file)
@@ -40,5 +40,7 @@ CONFIG_TPM_TIS_LPC=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_STORAGE=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_COREBOOT=y
 CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_TPM=y
index c34f45586be329bbf07e7c58e16709a10bc9d0f4..679955983bba613af4217210b224c1ff8c6bb5e1 100644 (file)
@@ -381,6 +381,10 @@ To enable video you must enable these options in coreboot:
    - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
    - Keep VESA framebuffer
 
+And include coreboot_fb.dtsi in your board's device tree source file, like:
+
+   /include/ "coreboot_fb.dtsi"
+
 At present it seems that for Minnowboard Max, coreboot does not pass through
 the video information correctly (it always says the resolution is 0x0). This
 works correctly for link though.
index 8a99d24c08f2ffeb24a395899147cbc371c73896..4a4241750ded0e241e63d28a068dabe8b0bcd737 100644 (file)
@@ -37,7 +37,7 @@ obj-$(CONFIG_S6E63D6) += s6e63d6.o
 obj-$(CONFIG_LD9040) += ld9040.o
 obj-$(CONFIG_SED156X) += sed156x.o
 obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
-obj-$(CONFIG_VIDEO_COREBOOT) += coreboot_fb.o
+obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o
 obj-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
 obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
 obj-$(CONFIG_VIDEO_IMX25LCDC) += imx25lcdc.o videomodes.o
index 43a9623f04aecd94bc8ccf26a8c20d0929c7b531..d058603b142a6fb32a9da2f2e566552fc2094a4a 100644 (file)
@@ -27,9 +27,9 @@
 
 #define CONFIG_ARCH_EARLY_INIT_R
 
-#define CONFIG_STD_DEVICES_SETTINGS     "stdin=serial,vga,usbkbd\0" \
-                                       "stdout=serial,vga\0" \
-                                       "stderr=serial,vga\0"
+#define CONFIG_STD_DEVICES_SETTINGS    "stdin=serial,usbkbd\0" \
+                                       "stdout=serial,vidconsole\0" \
+                                       "stderr=serial,vidconsole\0"
 
 #define CONFIG_ENV_SECT_SIZE           0x1000
 #define CONFIG_ENV_OFFSET              0x00ff0000