]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
rng: stm32: Implement configurable RNG clock error detection
authorGatien Chevallier <gatien.chevallier@foss.st.com>
Tue, 19 Sep 2023 15:27:55 +0000 (17:27 +0200)
committerPatrice Chotard <patrice.chotard@foss.st.com>
Wed, 4 Oct 2023 11:26:03 +0000 (13:26 +0200)
RNG clock error detection is now enabled if the "clock-error-detect"
property is set in the device tree.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
drivers/rng/stm32_rng.c

index 89da78c6c8bd2d2c7b40083f82adddce5cdd5c14..ada5d9221416a24d3155ea89a36d28b0db1d6e22 100644 (file)
@@ -40,6 +40,7 @@ struct stm32_rng_plat {
        struct clk clk;
        struct reset_ctl rst;
        const struct stm32_rng_data *data;
+       bool ced;
 };
 
 static int stm32_rng_read(struct udevice *dev, void *data, size_t len)
@@ -97,25 +98,34 @@ static int stm32_rng_init(struct stm32_rng_plat *pdata)
 
        cr = readl(pdata->base + RNG_CR);
 
-       /* Disable CED */
-       cr |= RNG_CR_CED;
        if (pdata->data->has_cond_reset) {
                cr |= RNG_CR_CONDRST;
+               if (pdata->ced)
+                       cr &= ~RNG_CR_CED;
+               else
+                       cr |= RNG_CR_CED;
                writel(cr, pdata->base + RNG_CR);
                cr &= ~RNG_CR_CONDRST;
+               cr |= RNG_CR_RNGEN;
                writel(cr, pdata->base + RNG_CR);
                err = readl_poll_timeout(pdata->base + RNG_CR, cr,
                                         (!(cr & RNG_CR_CONDRST)), 10000);
                if (err)
                        return err;
+       } else {
+               if (pdata->ced)
+                       cr &= ~RNG_CR_CED;
+               else
+                       cr |= RNG_CR_CED;
+
+               cr |= RNG_CR_RNGEN;
+
+               writel(cr, pdata->base + RNG_CR);
        }
 
        /* clear error indicators */
        writel(0, pdata->base + RNG_SR);
 
-       cr |= RNG_CR_RNGEN;
-       writel(cr, pdata->base + RNG_CR);
-
        err = readl_poll_timeout(pdata->base + RNG_SR, sr,
                                 sr & RNG_SR_DRDY, 10000);
        return err;
@@ -165,6 +175,8 @@ static int stm32_rng_of_to_plat(struct udevice *dev)
        if (err)
                return err;
 
+       pdata->ced = dev_read_bool(dev, "clock-error-detect");
+
        return 0;
 }