mx6: Add workaround for ARM errata

Add workaround for the following ARM errata: 743622 and 751472.

The motivation for this change is the following kernel commit 62e4d357a
(ARM: 7609/1: disable errata work-arounds which access
secure registers), which removes the errata from multiplatform kernel.

Since imx has been converted to multiplatform in the kernel, we need to apply
such workarounds into the bootloader.

Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel.

Explanation of each erratum is provided at "Chip Errata for the i.MX 6Dual/6Quad"
document available at: cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
index acadef221c8e845873c56563be1a20385aeda964..7b60ca7454b88319aaf832f573087ca0213d2b8b 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
@@ -20,6 +20,16 @@
 
 #include <linux/linkage.h>
 
+.macro init_arm_errata
+       /* ARM erratum ID #743622 */
+       mrc     p15, 0, r10, c15, c0, 1         /* read diagnostic register */
+       orr     r10, r10, #1 << 6               /* set bit #6 */
+       /* ARM erratum ID #751472 */
+       orr     r10, r10, #1 << 11              /* set bit #11 */
+       mcr     p15, 0, r10, c15, c0, 1         /* write diagnostic register */
+.endm
+
 ENTRY(lowlevel_init)
+       init_arm_errata
        mov pc, lr
 ENDPROC(lowlevel_init)