]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
rockchip: arm64: rk3399: syscon addition for rk3399
authorKever Yang <kever.yang@rock-chips.com>
Mon, 13 Feb 2017 09:38:59 +0000 (17:38 +0800)
committerSimon Glass <sjg@chromium.org>
Thu, 16 Mar 2017 22:03:44 +0000 (16:03 -0600)
rk3399 has different syscon registers which may used in spl,
add to support rk3399 spl.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/include/asm/arch-rockchip/clock.h
arch/arm/mach-rockchip/rk3399/syscon_rk3399.c

index 6f7e755d755f4cb6a61b745e09eae22c2fe5a643..b06bb6c9ec6948d01cd04452ef0849f7f784d401 100644 (file)
@@ -17,6 +17,8 @@ enum {
        ROCKCHIP_SYSCON_SGRF,
        ROCKCHIP_SYSCON_PMU,
        ROCKCHIP_SYSCON_PMUGRF,
+       ROCKCHIP_SYSCON_PMUSGRF,
+       ROCKCHIP_SYSCON_CIC,
 };
 
 /* Standard Rockchip clock numbers */
index 2cef68bc4df45c56e49dd2a686242dba642e6de1..d32985b4538885dc7dc0714c4d1a12e1e6a437ae 100644 (file)
@@ -12,6 +12,8 @@
 static const struct udevice_id rk3399_syscon_ids[] = {
        { .compatible = "rockchip,rk3399-grf", .data = ROCKCHIP_SYSCON_GRF },
        { .compatible = "rockchip,rk3399-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
+       { .compatible = "rockchip,rk3399-pmusgrf", .data = ROCKCHIP_SYSCON_PMUSGRF },
+       { .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC },
 };
 
 U_BOOT_DRIVER(syscon_rk3399) = {
@@ -19,3 +21,41 @@ U_BOOT_DRIVER(syscon_rk3399) = {
        .id = UCLASS_SYSCON,
        .of_match = rk3399_syscon_ids,
 };
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int rk3399_syscon_bind_of_platdata(struct udevice *dev)
+{
+       dev->driver_data = dev->driver->of_match->data;
+       debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
+
+       return 0;
+}
+
+U_BOOT_DRIVER(rockchip_rk3399_grf) = {
+       .name = "rockchip_rk3399_grf",
+       .id = UCLASS_SYSCON,
+       .of_match = rk3399_syscon_ids,
+       .bind = rk3399_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3399_pmugrf) = {
+       .name = "rockchip_rk3399_pmugrf",
+       .id = UCLASS_SYSCON,
+       .of_match = rk3399_syscon_ids + 1,
+       .bind = rk3399_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3399_pmusgrf) = {
+       .name = "rockchip_rk3399_pmusgrf",
+       .id = UCLASS_SYSCON,
+       .of_match = rk3399_syscon_ids + 2,
+       .bind = rk3399_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3399_cic) = {
+       .name = "rockchip_rk3399_cic",
+       .id = UCLASS_SYSCON,
+       .of_match = rk3399_syscon_ids + 3,
+       .bind = rk3399_syscon_bind_of_platdata,
+};
+#endif