]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
pci: layerscape: Fix the BARs disable function
authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Tue, 17 Dec 2019 10:10:43 +0000 (10:10 +0000)
committerPriyanka Jain <priyanka.jain@nxp.com>
Fri, 24 Jan 2020 08:58:26 +0000 (14:28 +0530)
There is not any difference for disabling BARs in RC mode
between PCIe controllers with and without SRIOV.

Fixes: 80afc63fc342 ("pci: layerscape: add pci driver based on DM")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
drivers/pci/pcie_layerscape.c

index 22d10cf737cf3199408c0a87ce5c2f7b39bd76ed..2ab67d1fc954324213913a4674550ad15d567ecd 100644 (file)
@@ -312,17 +312,6 @@ static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie)
 /* Disable all bars in RC mode */
 static void ls_pcie_disable_bars(struct ls_pcie *pcie)
 {
-       u32 sriov;
-
-       sriov = in_le32(pcie->dbi + PCIE_SRIOV);
-
-       /*
-        * TODO: For PCIe controller with SRIOV, the method to disable bars
-        * is different and more complex, so will add later.
-        */
-       if (PCI_EXT_CAP_ID(sriov) == PCI_EXT_CAP_ID_SRIOV)
-               return;
-
        dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_0);
        dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_1);
        dbi_writel(pcie, 0xfffffffe, PCIE_CS2_OFFSET + PCI_ROM_ADDRESS1);