]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARMV7: Add basic gpmc initialization for OMAP4
authorSteve Sakoman <steve@sakoman.com>
Thu, 15 Jul 2010 20:19:16 +0000 (16:19 -0400)
committerSandeep Paulraj <s-paulraj@ti.com>
Thu, 15 Jul 2010 20:19:16 +0000 (16:19 -0400)
This patch adds a gpmc_init function for OMAP4 and adds calls to
gpmc_init for existing OMAP4 boards: panda and sdp4430

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
arch/arm/cpu/armv7/omap4/Makefile
arch/arm/cpu/armv7/omap4/mem.c [new file with mode: 0644]
arch/arm/include/asm/arch-omap4/cpu.h
arch/arm/include/asm/arch-omap4/omap4.h
arch/arm/include/asm/arch-omap4/sys_proto.h
board/ti/panda/panda.c
board/ti/sdp4430/sdp.c

index ecf64f999bdd8902c0e861ce16b8ef6a937aa90d..d926fbb48024f69143c5c9968788ddfd09d2ed48 100644 (file)
@@ -28,6 +28,7 @@ LIB   =  $(obj)lib$(SOC).a
 SOBJS  += lowlevel_init.o
 
 COBJS  += board.o
+COBJS  += mem.o
 COBJS  += sys_info.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/omap4/mem.c b/arch/arm/cpu/armv7/omap4/mem.c
new file mode 100644 (file)
index 0000000..878f0e3
--- /dev/null
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Steve Sakoman <steve@sakoman.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/arch/cpu.h>
+#include <asm/arch/sys_proto.h>
+
+struct gpmc *gpmc_cfg;
+
+/*****************************************************
+ * gpmc_init(): init gpmc bus
+ * This code can only be executed from SRAM or SDRAM.
+ *****************************************************/
+void gpmc_init(void)
+{
+       gpmc_cfg = (struct gpmc *)GPMC_BASE;
+
+       /* global settings */
+       writel(0, &gpmc_cfg->irqenable); /* isr's sources masked */
+       writel(0, &gpmc_cfg->timeout_control);/* timeout disable */
+
+       /*
+        * Disable the GPMC0 config set by ROM code
+        * It conflicts with our MPDB (both at 0x08000000)
+        */
+       writel(0, &gpmc_cfg->cs[0].config7);
+}
index 7d8aa2092d97ecab5c9b35d169836a8c2d3b1114..c056b9501b8d2164e21d0f48fe903a50b0cabe4a 100644 (file)
 
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__
+struct gpmc_cs {
+       u32 config1;            /* 0x00 */
+       u32 config2;            /* 0x04 */
+       u32 config3;            /* 0x08 */
+       u32 config4;            /* 0x0C */
+       u32 config5;            /* 0x10 */
+       u32 config6;            /* 0x14 */
+       u32 config7;            /* 0x18 */
+       u32 nand_cmd;           /* 0x1C */
+       u32 nand_adr;           /* 0x20 */
+       u32 nand_dat;           /* 0x24 */
+       u8 res[8];              /* blow up to 0x30 byte */
+};
+
+struct gpmc {
+       u8 res1[0x10];
+       u32 sysconfig;          /* 0x10 */
+       u8 res2[0x4];
+       u32 irqstatus;          /* 0x18 */
+       u32 irqenable;          /* 0x1C */
+       u8 res3[0x20];
+       u32 timeout_control;    /* 0x40 */
+       u8 res4[0xC];
+       u32 config;             /* 0x50 */
+       u32 status;             /* 0x54 */
+       u8 res5[0x8];   /* 0x58 */
+       struct gpmc_cs cs[8];   /* 0x60, 0x90, .. */
+       u8 res6[0x14];          /* 0x1E0 */
+       u32 ecc_config;         /* 0x1F4 */
+       u32 ecc_control;        /* 0x1F8 */
+       u32 ecc_size_config;    /* 0x1FC */
+       u32 ecc1_result;        /* 0x200 */
+       u32 ecc2_result;        /* 0x204 */
+       u32 ecc3_result;        /* 0x208 */
+       u32 ecc4_result;        /* 0x20C */
+       u32 ecc5_result;        /* 0x210 */
+       u32 ecc6_result;        /* 0x214 */
+       u32 ecc7_result;        /* 0x218 */
+       u32 ecc8_result;        /* 0x21C */
+       u32 ecc9_result;        /* 0x220 */
+};
+
+/* Used for board specific gpmc initialization */
+extern struct gpmc *gpmc_cfg;
+
 struct gptimer {
        u32 tidr;               /* 0x00 r */
        u8 res[0xc];
@@ -86,6 +131,9 @@ struct watchdog {
 #define TCLR_AR                        (0x1 << 1)
 #define TCLR_PRE               (0x1 << 5)
 
+/* GPMC BASE */
+#define GPMC_BASE              (OMAP44XX_GPMC_BASE)
+
 /* I2C base */
 #define I2C_BASE1              (OMAP44XX_L4_PER_BASE + 0x70000)
 #define I2C_BASE2              (OMAP44XX_L4_PER_BASE + 0x72000)
index d123d6a0d42053893c5ed8fcbafd6e27a000e1a2..5243ea8e7fe667901d57a91dfe8da54bf72890eb 100644 (file)
@@ -62,7 +62,7 @@
 #define SYNC_32KTIMER_BASE     (OMAP44XX_L4_WKUP_BASE + 0x4000)
 
 /* GPMC */
-#define GPMC_BASE      0x50000000
+#define OMAP44XX_GPMC_BASE     0x50000000
 
 /*
  * Hardware Register Details
index 6f4d3d504b50799d737069f0ed3fd7d8c2272b7e..c6fab002fb9dde5d1ca37801283d3a6ae5b86ef5 100644 (file)
@@ -28,6 +28,7 @@ struct omap_sysinfo {
        char *board_string;
 };
 
+void gpmc_init(void);
 void watchdog_init(void);
 u32 get_device_type(void);
 void invalidate_dcache(u32);
index 46a5d1dcbf266ca62b2ec709174eb17657a887b8..917bbec5ec164bcdac88f9484f210da41d7591d0 100644 (file)
@@ -37,6 +37,8 @@ const struct omap_sysinfo sysinfo = {
  */
 int board_init(void)
 {
+       gpmc_init();
+
        gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA;
        gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
 
index 6ae016c6b8947cb234ef4718c23896cb4fe61048..8ed7873fde239a59c8a83b4882be7456b9ce1c2f 100644 (file)
@@ -38,6 +38,8 @@ const struct omap_sysinfo sysinfo = {
  */
 int board_init(void)
 {
+       gpmc_init();
+
        gd->bd->bi_arch_number = MACH_TYPE_OMAP_4430SDP;
        gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */