]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
configs: am64x_evm_*_defconfig: Rearrange the components in SRAM to satisfy the limit...
authorAswath Govindraju <a-govindraju@ti.com>
Fri, 4 Jun 2021 16:30:38 +0000 (22:00 +0530)
committerLokesh Vutla <lokeshvutla@ti.com>
Wed, 9 Jun 2021 16:53:44 +0000 (22:23 +0530)
For USB DFU boot mode there is a limitation on the load address of boot
images that they have to be less than 0x70001000. Therefore, move the
SPL_TEXT_BASE address to 0x70000000.

Currently ATF is being loaded at 0x70000000, if the SPL is being loaded at
0x70000000 then ATF would overwrite SPL image when loaded. Therefore, move
the location of ATF to a latter location in SRAM, past the SPL image. Also
rearrange the EEPROM and BSS data on top of ATF.

Given below is the placement of various data sections in SRAM

     ┌──────────────────────────────────────┐0x70000000
     │                                      │
     │                                      │
     │                                      │
     │    SPL IMAGE (Max size 1.5 MB)       │
     │                                      │
     │                                      │
     │                                      │
     ├──────────────────────────────────────┤0x7017FFFF
     │                                      │
     │           SPL STACK                  │
     │                                      │
     ├──────────────────────────────────────┤0x70192727
     │          GLOBAL DATA(216 B)          │
     ├──────────────────────────────────────┤0x701927FF
     │                                      │
     │       INITIAL HEAP (32 KB)           │
     │                                      │
     ├──────────────────────────────────────┤0x7019A7FF
     │                                      │
     │          BSS  (20 KB)                │
     ├──────────────────────────────────────┤0x7019F7FF
     │         EEPROM DATA (2 KB)           │
     ├──────────────────────────────────────┤0x7019FFFF
     │                                      │
     │                                      │
     │            ATF (123 KB)              │
     │                                      │
     │                                      │
     ├──────────────────────────────────────┤0x701BEBFB
     │   BOOT PARAMETER INDEX TABLE (5124 B)│
     ├──────────────────────────────────────┤0x701BFFFF
     │                                      │
     │SYSFW FIREWALLED DUE TO A BUG (128 KB)│
     │                                      │
     ├──────────────────────────────────────┤0x701DFFFF
     │                                      │
     │      DMSC CODE AREA (128 KB)         │
     │                                      │
     └──────────────────────────────────────┘0x701FFFFF

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-9-a-govindraju@ti.com
arch/arm/mach-k3/include/mach/am64_hardware.h
configs/am64x_evm_a53_defconfig
configs/am64x_evm_r5_defconfig
include/configs/am64x_evm.h

index 4ee41ad762ba00e925bf8bf725646ea36510be15..96383437d5b1a10cceed237b06d3b571a4b18737 100644 (file)
@@ -7,8 +7,6 @@
 #ifndef __ASM_ARCH_AM64_HARDWARE_H
 #define __ASM_ARCH_AM64_HARDWARE_H
 
-#include <config.h>
-
 #define CTRL_MMR0_BASE                                 0x43000000
 #define CTRLMMR_MAIN_DEVSTAT                           (CTRL_MMR0_BASE + 0x30)
 
@@ -54,7 +52,7 @@
 
 #define ROM_ENTENDED_BOOT_DATA_INFO                    0x701beb00
 
-/* Use Last 1K as Scratch pad */
-#define TI_SRAM_SCRATCH_BOARD_EEPROM_START             0x701bfc00
+/* Use Last 2K as Scratch pad */
+#define TI_SRAM_SCRATCH_BOARD_EEPROM_START             0x7019f800
 
 #endif /* __ASM_ARCH_DRA8_HARDWARE_H */
index 249b0dbabf6a2f10fbab2f5207087177e87f59db..8894ac1702d53c3d9fc000b21747839ed1ed27cf 100644 (file)
@@ -5,6 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SOC_K3_AM642=y
+CONFIG_K3_ATF_LOAD_ADDR=0x701a0000
 CONFIG_TARGET_AM642_A53_EVM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
index 2810fa1fc57d25c37b7e8557d5c47e91843bdc06..de0c814222c03978886957a9b3eb1ba47fc78cc5 100644 (file)
@@ -10,7 +10,7 @@ CONFIG_ENV_SIZE=0x20000
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
-CONFIG_SPL_TEXT_BASE=0x70020000
+CONFIG_SPL_TEXT_BASE=0x70000000
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
index 7c30e50c5f1e33aeb297773379fc711dd143237b..7c9bdc2d7d3ab486a1b9dee7cfc596c2c18ca1cd 100644 (file)
@@ -12,6 +12,7 @@
 #include <linux/sizes.h>
 #include <config_distro_bootcmd.h>
 #include <environment/ti/mmc.h>
+#include <asm/arch/am64_hardware.h>
 
 /* DDR Configuration */
 #define CONFIG_SYS_SDRAM_BASE1         0x880000000
@@ -43,7 +44,7 @@
  * location filled in by the boot ROM that we want to read out without any
  * interference from the C context.
  */
-#define CONFIG_SPL_BSS_START_ADDR      (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\
+#define CONFIG_SPL_BSS_START_ADDR      (TI_SRAM_SCRATCH_BOARD_EEPROM_START -\
                                         CONFIG_SPL_BSS_MAX_SIZE)
 /* Set the stack right below the SPL BSS section */
 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SPL_BSS_START_ADDR