Davinci: NAND enable ECC even when not in NAND boot mode

Davinci: NAND enable ECC even when not in NAND boot mode

On Davinci platforms, the default NAND device is enabled (for ECC)
in low level boot code when NAND boot mode is used. If booting in
another mode, NAND ECC is not enabled. The driver should make
sure ECC is enabled regardless of boot mode if NAND is configured
in U-Boot.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 1ad802a61deb4cf261a90ba39908dddcf5bde9cb..90e038e8713e962d4170d26a4dec41a6b522aa66 100644 (file)
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -87,6 +87,7 @@ static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)
        (void)readl(&(emif_regs->NANDFECC[CONFIG_SYS_NAND_CS - 2]));
 
        val = readl(&emif_regs->NANDFCR);
+       val |= DAVINCI_NANDFCR_NAND_ENABLE(CONFIG_SYS_NAND_CS);
        val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS);
        writel(val, &emif_regs->NANDFCR);
 }
@@ -219,6 +220,7 @@ static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int mode)
                 */
                val = readl(&emif_regs->NANDFCR);
                val &= ~DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK;
+               val |= DAVINCI_NANDFCR_NAND_ENABLE(CONFIG_SYS_NAND_CS);
                val |= DAVINCI_NANDFCR_4BIT_ECC_SEL(CONFIG_SYS_NAND_CS);
                val |= DAVINCI_NANDFCR_4BIT_ECC_START;
                writel(val, &emif_regs->NANDFCR);

diff --git a/include/asm-arm/arch-davinci/emif_defs.h b/include/asm-arm/arch-davinci/emif_defs.h
index d67292f4b4bf16f4cbe947848873859c39c2a402..8fd4e01b8e158c16aaa022e39285c57b010fd821 100644 (file)
--- a/include/asm-arm/arch-davinci/emif_defs.h
+++ b/include/asm-arm/arch-davinci/emif_defs.h
@@ -66,11 +66,10 @@ typedef struct {
 
 typedef emif_registers *emifregs;
 
+#define DAVINCI_NANDFCR_NAND_ENABLE(n)                 (1 << (n-2))
 #define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK              (3 << 4)
 #define DAVINCI_NANDFCR_4BIT_ECC_SEL(n)                        ((n-2) << 4)
-
 #define DAVINCI_NANDFCR_1BIT_ECC_START(n)              (1 << (8 + (n-2)))
-
 #define DAVINCI_NANDFCR_4BIT_ECC_START                 (1 << 12)
 #define DAVINCI_NANDFCR_4BIT_CALC_START                        (1 << 13)