COBJS := timer.o
COBJS += utils.o
+COBJS += gpio.o
ifdef CONFIG_SPL_BUILD
COBJS += spl.o
* published by the Free Software Foundation.
*/
#include <common.h>
-#include <asm/arch/gpio.h>
+#include <asm/omap_gpio.h>
#include <asm/io.h>
#include <asm/errno.h>
-static struct gpio_bank gpio_bank_34xx[6] = {
- { (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX },
- { (void *)OMAP34XX_GPIO2_BASE, METHOD_GPIO_24XX },
- { (void *)OMAP34XX_GPIO3_BASE, METHOD_GPIO_24XX },
- { (void *)OMAP34XX_GPIO4_BASE, METHOD_GPIO_24XX },
- { (void *)OMAP34XX_GPIO5_BASE, METHOD_GPIO_24XX },
- { (void *)OMAP34XX_GPIO6_BASE, METHOD_GPIO_24XX },
-};
-
-static struct gpio_bank *gpio_bank = &gpio_bank_34xx[0];
-
-static inline struct gpio_bank *get_gpio_bank(int gpio)
+static inline const struct gpio_bank *get_gpio_bank(int gpio)
{
- return &gpio_bank[gpio >> 5];
+ return &omap_gpio_bank[gpio >> 5];
}
static inline int get_gpio_index(int gpio)
return 0;
}
-static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
+static void _set_gpio_direction(const struct gpio_bank *bank, int gpio,
+ int is_input)
{
void *reg = bank->base;
u32 l;
switch (bank->method) {
case METHOD_GPIO_24XX:
- reg += OMAP24XX_GPIO_OE;
+ reg += OMAP_GPIO_OE;
break;
default:
return;
void omap_set_gpio_direction(int gpio, int is_input)
{
- struct gpio_bank *bank;
+ const struct gpio_bank *bank;
if (check_gpio(gpio) < 0)
return;
_set_gpio_direction(bank, get_gpio_index(gpio), is_input);
}
-static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
+static void _set_gpio_dataout(const struct gpio_bank *bank, int gpio,
+ int enable)
{
void *reg = bank->base;
u32 l = 0;
switch (bank->method) {
case METHOD_GPIO_24XX:
if (enable)
- reg += OMAP24XX_GPIO_SETDATAOUT;
+ reg += OMAP_GPIO_SETDATAOUT;
else
- reg += OMAP24XX_GPIO_CLEARDATAOUT;
+ reg += OMAP_GPIO_CLEARDATAOUT;
l = 1 << gpio;
break;
default:
void omap_set_gpio_dataout(int gpio, int enable)
{
- struct gpio_bank *bank;
+ const struct gpio_bank *bank;
if (check_gpio(gpio) < 0)
return;
int omap_get_gpio_datain(int gpio)
{
- struct gpio_bank *bank;
+ const struct gpio_bank *bank;
void *reg;
if (check_gpio(gpio) < 0)
reg = bank->base;
switch (bank->method) {
case METHOD_GPIO_24XX:
- reg += OMAP24XX_GPIO_DATAIN;
+ reg += OMAP_GPIO_DATAIN;
break;
default:
return -EINVAL;
& (1 << get_gpio_index(gpio))) != 0;
}
-static void _reset_gpio(struct gpio_bank *bank, int gpio)
+static void _reset_gpio(const struct gpio_bank *bank, int gpio)
{
_set_gpio_direction(bank, get_gpio_index(gpio), 1);
}
void omap_free_gpio(int gpio)
{
- struct gpio_bank *bank;
+ const struct gpio_bank *bank;
if (check_gpio(gpio) < 0)
return;
COBJS += board.o
COBJS += clock.o
-COBJS += gpio.o
COBJS += mem.o
COBJS += sys_info.o
#include <asm/arch/mem.h>
#include <asm/cache.h>
#include <asm/armv7.h>
+#include <asm/omap_gpio.h>
/* Declarations */
extern omap3_sysinfo sysinfo;
static void omap3_setup_aux_cr(void);
static void omap3_invalidate_l2_cache_secure(void);
+static const struct gpio_bank gpio_bank_34xx[6] = {
+ { (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP34XX_GPIO2_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP34XX_GPIO3_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP34XX_GPIO4_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP34XX_GPIO5_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP34XX_GPIO6_BASE, METHOD_GPIO_24XX },
+};
+
+const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
+
/******************************************************************************
* Routine: delay
* Description: spinning delay to use before udelay works
#include <asm/arch/sys_proto.h>
#include <asm/sizes.h>
#include <asm/arch/emif.h>
+#include <asm/omap_gpio.h>
#include "omap4_mux_data.h"
DECLARE_GLOBAL_DATA_PTR;
u32 *const omap4_revision = (u32 *)OMAP4_SRAM_SCRATCH_OMAP4_REV;
+static const struct gpio_bank gpio_bank_44xx[6] = {
+ { (void *)OMAP44XX_GPIO1_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP44XX_GPIO2_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP44XX_GPIO3_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP44XX_GPIO4_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP44XX_GPIO5_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP44XX_GPIO6_BASE, METHOD_GPIO_24XX },
+};
+
+const struct gpio_bank *const omap_gpio_bank = gpio_bank_44xx;
+
#ifdef CONFIG_SPL_BUILD
/*
* We use static variables because global data is not ready yet.
case OMAP_INIT_CONTEXT_SPL:
case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
+ enable_basic_clocks();
scale_vcores();
setup_dplls();
- enable_basic_clocks();
setup_non_essential_dplls();
enable_non_essential_clocks();
break;
/* MUSB base */
#define MUSB_BASE (OMAP34XX_CORE_L4_IO_BASE + 0xAB000)
+/* OMAP3 GPIO registers */
+#define OMAP_GPIO_REVISION 0x0000
+#define OMAP_GPIO_SYSCONFIG 0x0010
+#define OMAP_GPIO_SYSSTATUS 0x0014
+#define OMAP_GPIO_IRQSTATUS1 0x0018
+#define OMAP_GPIO_IRQSTATUS2 0x0028
+#define OMAP_GPIO_IRQENABLE2 0x002c
+#define OMAP_GPIO_IRQENABLE1 0x001c
+#define OMAP_GPIO_WAKE_EN 0x0020
+#define OMAP_GPIO_CTRL 0x0030
+#define OMAP_GPIO_OE 0x0034
+#define OMAP_GPIO_DATAIN 0x0038
+#define OMAP_GPIO_DATAOUT 0x003c
+#define OMAP_GPIO_LEVELDETECT0 0x0040
+#define OMAP_GPIO_LEVELDETECT1 0x0044
+#define OMAP_GPIO_RISINGDETECT 0x0048
+#define OMAP_GPIO_FALLINGDETECT 0x004c
+#define OMAP_GPIO_DEBOUNCE_EN 0x0050
+#define OMAP_GPIO_DEBOUNCE_VAL 0x0054
+#define OMAP_GPIO_CLEARIRQENABLE1 0x0060
+#define OMAP_GPIO_SETIRQENABLE1 0x0064
+#define OMAP_GPIO_CLEARWKUENA 0x0080
+#define OMAP_GPIO_SETWKUENA 0x0084
+#define OMAP_GPIO_CLEARDATAOUT 0x0090
+#define OMAP_GPIO_SETDATAOUT 0x0094
+
#endif /* _CPU_H */
/* MUSB base */
#define MUSB_BASE (OMAP44XX_L4_CORE_BASE + 0xAB000)
+/* OMAP4 GPIO registers */
+#define OMAP_GPIO_REVISION 0x0000
+#define OMAP_GPIO_SYSCONFIG 0x0010
+#define OMAP_GPIO_SYSSTATUS 0x0114
+#define OMAP_GPIO_IRQSTATUS1 0x0118
+#define OMAP_GPIO_IRQSTATUS2 0x0128
+#define OMAP_GPIO_IRQENABLE2 0x012c
+#define OMAP_GPIO_IRQENABLE1 0x011c
+#define OMAP_GPIO_WAKE_EN 0x0120
+#define OMAP_GPIO_CTRL 0x0130
+#define OMAP_GPIO_OE 0x0134
+#define OMAP_GPIO_DATAIN 0x0138
+#define OMAP_GPIO_DATAOUT 0x013c
+#define OMAP_GPIO_LEVELDETECT0 0x0140
+#define OMAP_GPIO_LEVELDETECT1 0x0144
+#define OMAP_GPIO_RISINGDETECT 0x0148
+#define OMAP_GPIO_FALLINGDETECT 0x014c
+#define OMAP_GPIO_DEBOUNCE_EN 0x0150
+#define OMAP_GPIO_DEBOUNCE_VAL 0x0154
+#define OMAP_GPIO_CLEARIRQENABLE1 0x0160
+#define OMAP_GPIO_SETIRQENABLE1 0x0164
+#define OMAP_GPIO_CLEARWKUENA 0x0180
+#define OMAP_GPIO_SETWKUENA 0x0184
+#define OMAP_GPIO_CLEARDATAOUT 0x0190
+#define OMAP_GPIO_SETDATAOUT 0x0194
+
#endif /* _CPU_H */
#define DEV_DATA_PTR_OFFSET 0x18
#define BOOT_MODE_OFFSET 0x8
+/* GPIO */
+#define OMAP44XX_GPIO1_BASE 0x4A310000
+#define OMAP44XX_GPIO2_BASE 0x48055000
+#define OMAP44XX_GPIO3_BASE 0x48057000
+#define OMAP44XX_GPIO4_BASE 0x48059000
+#define OMAP44XX_GPIO5_BASE 0x4805B000
+#define OMAP44XX_GPIO6_BASE 0x4805D000
+
#endif
#ifndef _GPIO_H
#define _GPIO_H
-#define OMAP24XX_GPIO_REVISION 0x0000
-#define OMAP24XX_GPIO_SYSCONFIG 0x0010
-#define OMAP24XX_GPIO_SYSSTATUS 0x0014
-#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
-#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
-#define OMAP24XX_GPIO_IRQENABLE2 0x002c
-#define OMAP24XX_GPIO_IRQENABLE1 0x001c
-#define OMAP24XX_GPIO_WAKE_EN 0x0020
-#define OMAP24XX_GPIO_CTRL 0x0030
-#define OMAP24XX_GPIO_OE 0x0034
-#define OMAP24XX_GPIO_DATAIN 0x0038
-#define OMAP24XX_GPIO_DATAOUT 0x003c
-#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
-#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
-#define OMAP24XX_GPIO_RISINGDETECT 0x0048
-#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
-#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
-#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
-#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
-#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
-#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
-#define OMAP24XX_GPIO_SETWKUENA 0x0084
-#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
-#define OMAP24XX_GPIO_SETDATAOUT 0x0094
+#include <asm/arch/cpu.h>
struct gpio_bank {
void *base;
int method;
};
+extern const struct gpio_bank *const omap_gpio_bank;
+
#define METHOD_GPIO_24XX 4
/* This is the interface */