mips: bmips: add bcm6345-gpio driver support for BCM6358

This SoC has one gpio bank divided into two 32 bit registers, with a total of
40 GPIOs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/mips/dts/brcm,bcm6358.dtsi b/arch/mips/dts/brcm,bcm6358.dtsi
index 48322fb143838da48483e044dd100dd499a0e2e2..4c945552044a797ee197d9eeb2a2ab31dcf48d9a 100644 (file)
--- a/arch/mips/dts/brcm,bcm6358.dtsi
+++ b/arch/mips/dts/brcm,bcm6358.dtsi
@@ -73,6 +73,25 @@
                        mask = <0x1>;
                };
 
+               gpio1: gpio-controller@fffe0080 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0xfffe0080 0x4>, <0xfffe0088 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       ngpios = <8>;
+
+                       status = "disabled";
+               };
+
+               gpio0: gpio-controller@fffe0084 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0xfffe0084 0x4>, <0xfffe008c 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       status = "disabled";
+               };
+
                uart0: serial@fffe0100 {
                        compatible = "brcm,bcm6345-uart";
                        reg = <0xfffe0100 0x18>;