board: sama5d2_ptc_ek: adjust the smc timings of nand

To fix the issue of write the rootfs.ubi, adjust the smc timings
configuration of the nand controller.

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>

diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
index 206e858b32136cce08af9896429d8a27f0248c4a..789841e45a94cb06ba0fd4b8e7c4b7fb70d6d5ea 100644 (file)
--- a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
+++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
@@ -33,10 +33,10 @@ static void board_nand_hw_init(void)
        writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
               AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
               &smc->cs[3].setup);
-       writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(3) |
+       writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(4) |
               AT91_SMC_PULSE_NRD(2) | AT91_SMC_PULSE_NCS_RD(3),
               &smc->cs[3].pulse);
-       writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+       writel(AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(5),
               &smc->cs[3].cycle);
        writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) |
               AT91_SMC_TIMINGS_TAR(2)  | AT91_SMC_TIMINGS_TRR(3)   |