pci: Drop PCI_INDIRECT_BRIDGE

This does not work with driver model so can be removed.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/README b/README
index 1c1db9809878cb0baab878755c08a6a72c440cac..a3f81e4aed02576c6d38ae495e4791b160de562c 100644 (file)
--- a/README
+++ b/README
@@ -2776,9 +2776,6 @@ Low Level (hardware related) configuration options:
   CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
                Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)
 
-- CONFIG_PCI_INDIRECT_BRIDGE:
-               Enable support for indirect PCI bridges.
-
 - CONFIG_SYS_SRIO:
                Chip has SRIO or not
 

diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index bdfdec98a08f220ff4d7de96c143cef9bc4265c0..4a131bf5ca451e1b4f0fc217b2372da51b7b564b 100644 (file)
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_PCI) += pci_auto_common.o pci_common.o
 obj-$(CONFIG_PCIE_ECAM_GENERIC) += pcie_ecam_generic.o
 obj-$(CONFIG_PCIE_ECAM_SYNQUACER) += pcie_ecam_synquacer.o
 obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o
-obj-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o
 obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o
 obj-$(CONFIG_PCI_MPC85XX) += pci_mpc85xx.o
 obj-$(CONFIG_PCI_MSC01) += pci_msc01.o

diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c
deleted file mode 100644 (file)
index 6134c22..0000000
--- a/drivers/pci/pci_indirect.c
+++ /dev/null
@@ -1,71 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Support for indirect PCI bridges.
- *
- * Copyright (C) 1998 Gabriel Paubert.
- */
-
-#include <common.h>
-
-#if !defined(__I386__) && !defined(CONFIG_DM_PCI)
-
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <pci.h>
-
-#define cfg_read(val, addr, type, op)  *val = op((type)(addr))
-#define cfg_write(val, addr, type, op) op((type *)(addr), (val))
-
-#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
-#define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
-static int                                                               \
-indirect_##rw##_config_##size(struct pci_controller *hose,               \
-                             pci_dev_t dev, int offset, type val)       \
-{                                                                        \
-       u32 b, d,f;                                                      \
-       b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);           \
-       b = b - hose->first_busno;                                       \
-       dev = PCI_BDF(b, d, f);                                          \
-       *(hose->cfg_addr) = dev | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; \
-       sync();                                                          \
-       cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
-       return 0;                                                        \
-}
-#else
-#define INDIRECT_PCI_OP(rw, size, type, op, mask)                       \
-static int                                                              \
-indirect_##rw##_config_##size(struct pci_controller *hose,              \
-                             pci_dev_t dev, int offset, type val)       \
-{                                                                       \
-       u32 b, d,f;                                                      \
-       b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);           \
-       b = b - hose->first_busno;                                       \
-       dev = PCI_BDF(b, d, f);                                          \
-       out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
-       cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
-       return 0;                                                        \
-}
-#endif
-
-INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
-INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
-INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
-INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
-INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
-INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
-
-void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
-{
-       pci_set_ops(hose,
-                   indirect_read_config_byte,
-                   indirect_read_config_word,
-                   indirect_read_config_dword,
-                   indirect_write_config_byte,
-                   indirect_write_config_word,
-                   indirect_write_config_dword);
-
-       hose->cfg_addr = (unsigned int *) cfg_addr;
-       hose->cfg_data = (unsigned char *) cfg_data;
-}
-
-#endif /* !__I386__ */

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index d6ae419456ae9a9562e6170d887d57a2c1b6355e..b4e1cae893856b931ad81a7ab8abb186cc1d15a5 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -303,10 +303,6 @@
 #define CONFIG_SYS_SICRH 0
 #define CONFIG_SYS_SICRL SICRL_LDP_A
 
-#ifdef CONFIG_PCI
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#endif
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed of kgdb serial port */
 #endif

diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index 8ebca99d98b8011ade1589164ce88b8607fb950d..7924cbc8a3ee9de38c42ceb01dd4a836f84553a2 100644 (file)
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -360,10 +360,6 @@
 #define CONFIG_SYS_SICRH 0
 #define CONFIG_SYS_SICRL SICRL_LDP_A
 
-#ifdef CONFIG_PCI
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#endif
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed of kgdb serial port */
 #endif

diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 0a136b4f92f5dbf63099604d11c013cb100d538f..a13b178d6afece1e1fbab0fd759cc4dd3daaee12 100644 (file)
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -255,8 +255,6 @@
 #define CONFIG_SYS_PCIE2_IO_SIZE       0x00800000
 
 #ifdef CONFIG_PCI
-#define CONFIG_PCI_INDIRECT_BRIDGE
-
 #undef CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 

diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index ac9afa179a5fc18aec106b041df0d3ae1c2f1557..549fbfa65c7b41aa7af68ce3e8640542ae397cfd 100644 (file)
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -26,7 +26,6 @@
 #define CONFIG_HAS_FEC         1       /* 8540 has FEC */
 #endif
 
-#define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */
 
 /*

diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 02aeb6f3d5367983dcfe4b0d2b21361328852c73..5254936a4b2646df0b72a7912d99ea5fc8b4e29f 100644 (file)
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -27,7 +27,6 @@
  * assume U-Boot is less than 0.5MB
  */
 
-#define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */
 #undef CONFIG_ETHER_ON_FCC             /* cpm FCC ethernet support */
 #define CONFIG_RESET_PHY_R     1       /* Call reset_phy() */

diff --git a/include/pci.h b/include/pci.h
index 2c2930e7a74cc0230de6cc7edd36d7cd644e23fd..0fc22adffd00eec7c22279e0272ab9c13f770c4f 100644 (file)
--- a/include/pci.h
+++ b/include/pci.h
@@ -656,10 +656,6 @@ struct pci_controller {
        struct pci_region *pci_mem, *pci_io, *pci_prefetch;
 };
 
-#ifdef CONFIG_PCI_INDIRECT_BRIDGE
-extern void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data);
-#endif
-
 #if defined(CONFIG_DM_PCI_COMPAT)
 extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
                                        pci_addr_t addr, unsigned long flags);

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index fd891e0bf27807f3ce1f9265c15e197a9fc88165..25f95da69912420a640c178606eed0ca3dd03d4c 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1087,7 +1087,6 @@ CONFIG_PCI_CONFIG_HOST_BRIDGE
 CONFIG_PCI_EHCI_DEVICE
 CONFIG_PCI_EHCI_DEVNO
 CONFIG_PCI_GT64120
-CONFIG_PCI_INDIRECT_BRIDGE
 CONFIG_PCI_IO_BUS
 CONFIG_PCI_IO_PHYS
 CONFIG_PCI_IO_SIZE