ARM: dts: uniphier: add device nodes for System Control blocks

These are mainly used for controlling clocks and resets.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/dts/uniphier-common32.dtsi b/arch/arm/dts/uniphier-common32.dtsi
index de04de1111eae5c3fa74b5fa212bc776ffd6c910..d3e5a74d79d6076cea1fda0bce299cf4f04e89d5 100644 (file)
--- a/arch/arm/dts/uniphier-common32.dtsi
+++ b/arch/arm/dts/uniphier-common32.dtsi
@@ -101,6 +101,14 @@
                        reg = <0x5f801000 0xe00>;
                };
 
+               sysctrl: sysctrl@61840000 {
+                       /* specify compatible in each SoC DTSI */
+                       reg = <0x61840000 0x4000>;
+                       #clock-cells = <1>;
+                       clock-names = "ref";
+                       clocks = <&refclk>;
+               };
+
                nand: nand@68000000 {
                        compatible = "denali,denali-nand-dt";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;

diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index 6f15978a8d3c710b70922493d9b91725c0c3b095..6bd4b91eb8d067b6c5556fee2311c4f0a7e06d83 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -160,3 +160,7 @@
 &pinctrl {
        compatible = "socionext,ph1-ld4-pinctrl", "syscon";
 };
+
+&sysctrl {
+       compatible = "socionext,ph1-ld4-sysctrl";
+};

diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi
index a236dbc13f9c75f30f4d4e5c30904e9f8d76ab15..984f99ccf8d2f0e50b990f549e0edb1c498d3a21 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi
@@ -200,3 +200,7 @@
 &pinctrl {
        compatible = "socionext,ph1-pro4-pinctrl", "syscon";
 };
+
+&sysctrl {
+       compatible = "socionext,ph1-pro4-sysctrl";
+};

diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi
index 120767c7fae428bffc60aea9a2ec483c51a66fcc..a83617616803fdb6bdc1015e8cc3a85ed2e1bc66 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi
@@ -194,3 +194,7 @@
 &pinctrl {
        compatible = "socionext,ph1-pro5-pinctrl", "syscon";
 };
+
+&sysctrl {
+       compatible = "socionext,ph1-pro5-sysctrl";
+};

diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index 9ff9584991e6951b4f9e42a0e956e24b8f22d614..c7a890227d07acfb252263ac12908b998d64b665 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -206,6 +206,14 @@
                        interrupts = <0 83 4>;
                };
 
+               sysctrl: sysctrl@f1840000 {
+                       compatible = "socionext,ph1-sld3-sysctrl";
+                       reg = <0xf1840000 0x4000>;
+                       #clock-cells = <1>;
+                       clock-names = "ref";
+                       clocks = <&refclk>;
+               };
+
                nand: nand@f8000000 {
                        compatible = "denali,denali-nand-dt";
                        reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;

diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index e765a4bb073346cc41455c98c719e25ee70b5642..9d97fb03a06a24307aa72fbbce4cccbb7283e92c 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -160,3 +160,7 @@
 &pinctrl {
        compatible = "socionext,ph1-sld8-pinctrl", "syscon";
 };
+
+&sysctrl {
+       compatible = "socionext,ph1-sld8-sysctrl";
+};

diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi b/arch/arm/dts/uniphier-proxstream2.dtsi
index c7423ff9b6868dcc9150cbfccda6195250928be1..f6f4bbec3c8f0319ef4f08f2537d6676145e969e 100644 (file)
--- a/arch/arm/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/dts/uniphier-proxstream2.dtsi
@@ -205,3 +205,7 @@
 &pinctrl {
        compatible = "socionext,proxstream2-pinctrl", "syscon";
 };
+
+&sysctrl {
+       compatible = "socionext,proxstream2-sysctrl";
+};