pinctrl: renesas: Add support for R8A774C0

Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car
E3 (a.k.a. r8a77990), however it doesn't have several automotive
specific peripherals.

This patch hooks R8A774C0 SoC with the pfc driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>

diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index 7eec65d8ea0f10f3ae887215b6917b343228daea..28c2628a3cb05a4f86956573a2e15b5b3ac17f28 100644 (file)
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -15,6 +15,7 @@ config R8A774B1
 config R8A774C0
        bool "Renesas SoC R8A774C0"
        imply CLK_R8A774C0
+       imply PINCTRL_PFC_R8A774C0
 
 config R8A774E1
        bool "Renesas SoC R8A774E1"

diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig
index d2be4c84ba11c8be22f94fdd30fc83b0e49103b3..8fb9cba3875aab30988d773952a064aadca4fc4f 100644 (file)
--- a/drivers/pinctrl/renesas/Kconfig
+++ b/drivers/pinctrl/renesas/Kconfig
@@ -77,6 +77,16 @@ config PINCTRL_PFC_R8A774B1
           the GPIO definitions and pin control functions for each available
           multiplex function.
 
+config PINCTRL_PFC_R8A774C0
+        bool "Renesas RZ/G2 R8A774C0 pin control driver"
+        depends on PINCTRL_PFC
+        help
+          Support pin multiplexing control on Renesas RZ/G2E R8A774C0 SoCs.
+
+          The driver is controlled by a device tree node which contains both
+          the GPIO definitions and pin control functions for each available
+          multiplex function.
+
 config PINCTRL_PFC_R8A774E1
         bool "Renesas RZ/G2 R8A774E1 pin control driver"
         depends on PINCTRL_PFC

diff --git a/drivers/pinctrl/renesas/Makefile b/drivers/pinctrl/renesas/Makefile
index 1d0075205128d20fb59e764ddd4171f2cc6b8fed..0e2ac3c5136865bafd431c5c043c044b0ec9f80f 100644 (file)
--- a/drivers/pinctrl/renesas/Makefile
+++ b/drivers/pinctrl/renesas/Makefile
@@ -1,6 +1,7 @@
 obj-$(CONFIG_PINCTRL_PFC) += pfc.o
 obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
 obj-$(CONFIG_PINCTRL_PFC_R8A774B1) += pfc-r8a77965.o
+obj-$(CONFIG_PINCTRL_PFC_R8A774C0) += pfc-r8a77990.o
 obj-$(CONFIG_PINCTRL_PFC_R8A774E1) += pfc-r8a7795.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o

diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c
index 6ff948420c5a3ee1144952f8515517a7c35353aa..07fcc3d39310f7f7162dd8fba3bbe95acaddbecc 100644 (file)
--- a/drivers/pinctrl/renesas/pfc.c
+++ b/drivers/pinctrl/renesas/pfc.c
@@ -34,6 +34,7 @@ enum sh_pfc_model {
        SH_PFC_R8A7796,
        SH_PFC_R8A774A1,
        SH_PFC_R8A774B1,
+       SH_PFC_R8A774C0,
        SH_PFC_R8A774E1,
        SH_PFC_R8A77965,
        SH_PFC_R8A77970,
@@ -927,6 +928,10 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev)
        if (model == SH_PFC_R8A774B1)
                priv->pfc.info = &r8a774b1_pinmux_info;
 #endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774C0
+       if (model == SH_PFC_R8A774C0)
+               priv->pfc.info = &r8a774c0_pinmux_info;
+#endif
 #ifdef CONFIG_PINCTRL_PFC_R8A774E1
        if (model == SH_PFC_R8A774E1)
                priv->pfc.info = &r8a774e1_pinmux_info;
@@ -1014,6 +1019,12 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = {
                .data = SH_PFC_R8A774B1,
        },
 #endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774C0
+       {
+               .compatible = "renesas,pfc-r8a774c0",
+               .data = SH_PFC_R8A774C0,
+       },
+#endif
 #ifdef CONFIG_PINCTRL_PFC_R8A774E1
        {
                .compatible = "renesas,pfc-r8a774e1",

diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index 22cc860f2961d0c31fbcdccdf6d3ebd17c2c5d2c..f563916f1091ca120b952068b09692f38585102c 100644 (file)
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -295,6 +295,7 @@ sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
 
 extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
 extern const struct sh_pfc_soc_info r8a774b1_pinmux_info;
+extern const struct sh_pfc_soc_info r8a774c0_pinmux_info;
 extern const struct sh_pfc_soc_info r8a774e1_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7791_pinmux_info;