#########################################################################
LIST_I486=" \
- sc520_cdp \
sc520_eNET \
- sc520_spunk \
- sc520_spunk_rel \
"
LIST_x86=" \
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2002
-# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).a
-
-COBJS-y += sc520_cdp.o
-COBJS-y += flash.o
-COBJS-$(CONFIG_PCI) += sc520_cdp_pci.o
-SOBJS-y += sc520_cdp_asm.o
-SOBJS-y += sc520_cdp_asm16.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-#
-# (C) Copyright 2002
-# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-
-TEXT_BASE = 0x387c0000
+++ /dev/null
-/*
- * (C) Copyright 2002, 2003
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <pci.h>
-#include <asm/ic/sc520.h>
-
-#define PROBE_BUFFER_SIZE 1024
-static unsigned char buffer[PROBE_BUFFER_SIZE];
-
-#define SC520_MAX_FLASH_BANKS 3
-#define SC520_FLASH_BANK0_BASE 0x38000000 /* BOOTCS */
-#define SC520_FLASH_BANK1_BASE 0x30000000 /* ROMCS0 */
-#define SC520_FLASH_BANK2_BASE 0x28000000 /* ROMCS1 */
-#define SC520_FLASH_BANKSIZE 0x8000000
-
-#define AMD29LV016B_SIZE 0x200000
-#define AMD29LV016B_SECTORS 32
-
-flash_info_t flash_info[SC520_MAX_FLASH_BANKS];
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-
-static u32 _probe_flash(u32 addr, u32 bw, int il)
-{
- u32 result=0;
-
- /* First do an unlock cycle for the benefit of
- * devices that need it */
-
- switch (bw) {
-
- case 1:
- *(volatile u8*)(addr+0x5555) = 0xaa;
- *(volatile u8*)(addr+0x2aaa) = 0x55;
- *(volatile u8*)(addr+0x5555) = 0x90;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0x5555), 0xf0;
- break;
-
- case 2:
- *(volatile u16*)(addr+0xaaaa) = 0xaaaa;
- *(volatile u16*)(addr+0x5554) = 0x5555;
-
- /* Issue identification command */
- if (il == 2) {
- *(volatile u16*)(addr+0xaaaa) = 0x9090;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u16*)addr = 0xffff;
- *(volatile u16*)(addr+0xaaaa), 0xf0f0;
-
- } else {
- *(volatile u8*)(addr+0xaaaa) = 0x90;
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0xaaaa), 0xf0;
- }
-
- break;
-
- case 4:
- *(volatile u32*)(addr+0x5554) = 0xaaaaaaaa;
- *(volatile u32*)(addr+0xaaa8) = 0x55555555;
-
- switch (il) {
- case 1:
- /* Issue identification command */
- *(volatile u8*)(addr+0x5554) = 0x90;
-
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0x5554), 0xf0;
- break;
-
- case 2:
- /* Issue identification command */
- *(volatile u32*)(addr + 0x5554) = 0x00900090;
-
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u32*)addr = 0x00ff00ff;
- *(volatile u32*)(addr+0x5554), 0x00f000f0;
- break;
-
- case 4:
- /* Issue identification command */
- *(volatile u32*)(addr+0x5554) = 0x90909090;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u32*)addr = 0xffffffff;
- *(volatile u32*)(addr+0x5554), 0xf0f0f0f0;
- break;
- }
- break;
- }
-
-
- return result;
-}
-
-extern int _probe_flash_end;
-asm ("_probe_flash_end:\n"
- ".long 0\n");
-
-static int identify_flash(unsigned address, int width)
-{
- int is;
- int device;
- int vendor;
- int size;
- unsigned res;
-
- u32 (*_probe_flash_ptr)(u32 a, u32 bw, int il);
-
- size = (unsigned)&_probe_flash_end - (unsigned)_probe_flash;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_probe_flash() routine too large (%d) %p - %p\n",
- size, &_probe_flash_end, _probe_flash);
- return 0;
- }
-
- memcpy(buffer, _probe_flash, size);
- _probe_flash_ptr = (void*)buffer;
-
- is = disable_interrupts();
- res = _probe_flash_ptr(address, width, 1);
- if (is) {
- enable_interrupts();
- }
-
-
- vendor = res >> 16;
- device = res & 0xffff;
-
-
- return res;
-}
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < SC520_MAX_FLASH_BANKS; i++) {
- unsigned id;
- ulong flashbase = 0;
- int sectsize = 0;
-
- memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- switch (i) {
- case 0:
- flashbase = SC520_FLASH_BANK0_BASE;
- break;
- case 1:
- flashbase = SC520_FLASH_BANK1_BASE;
- break;
- case 2:
- flashbase = SC520_FLASH_BANK2_BASE;
- break;
- default:
- panic("configured too many flash banks!\n");
- }
-
- id = identify_flash(flashbase, 4);
- switch (id & 0x00ff00ff) {
- case 0x000100c8:
- /* 29LV016B/29LV017B */
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV016B & FLASH_TYPEMASK);
-
- flash_info[i].size = AMD29LV016B_SIZE*4;
- flash_info[i].sector_count = AMD29LV016B_SECTORS;
- sectsize = (AMD29LV016B_SIZE*4)/AMD29LV016B_SECTORS;
- printf("Bank %d: 4 x AMD 29LV017B\n", i);
- break;
-
-
- default:
- printf("Bank %d have unknown flash %08x\n", i, id);
- flash_info[i].flash_id = FLASH_UNKNOWN;
- continue;
- }
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase + j * sectsize;
- }
- size += flash_info[i].size;
-
- flash_protect(FLAG_PROTECT_CLEAR,
- flash_info[i].start[0],
- flash_info[i].start[0] + flash_info[i].size - 1,
- &flash_info[i]);
- }
-
- /*
- * Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- i386boot_start,
- i386boot_end,
- &flash_info[0]);
-#ifdef CONFIG_ENV_ADDR
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t *info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
-
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf("AMD: ");
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV016B & FLASH_TYPEMASK):
- printf("4x AMD29LV017B (4x16Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto done;
- break;
- }
-
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-done: ;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/* this needs to be inlined, the SWTMRMMILLI register is reset by each read */
-#define __udelay(delay) \
-{ \
- unsigned micro; \
- unsigned milli=0; \
- \
- micro = sc520_mmcr->swtmrmilli; \
- \
- for (;;) { \
- \
- milli += sc520_mmcr->swtmrmilli; \
- micro = sc520_mmcr->swtmrmicro; \
- \
- if ((delay) <= (micro + (milli * 1000))) { \
- break; \
- } \
- } \
-} while (0)
-
-static u32 _amd_erase_flash(u32 addr, u32 sector)
-{
- unsigned elapsed;
-
- /* Issue erase */
- *(volatile u32*)(addr + 0x5554) = 0xAAAAAAAA;
- *(volatile u32*)(addr + 0xaaa8) = 0x55555555;
- *(volatile u32*)(addr + 0x5554) = 0x80808080;
- /* And one unlock */
- *(volatile u32*)(addr + 0x5554) = 0xAAAAAAAA;
- *(volatile u32*)(addr + 0xaaa8) = 0x55555555;
- /* Sector erase command comes last */
- *(volatile u32*)(addr + sector) = 0x30303030;
-
- elapsed = sc520_mmcr->swtmrmilli; /* dummy read */
- elapsed = 0;
- __udelay(50);
- while (((*(volatile u32*)(addr + sector)) & 0x80808080) != 0x80808080) {
-
- elapsed += sc520_mmcr->swtmrmilli;
- if (elapsed > ((CONFIG_SYS_FLASH_ERASE_TOUT/CONFIG_SYS_HZ) * 1000)) {
- *(volatile u32*)(addr) = 0xf0f0f0f0;
- return 1;
- }
- }
-
- *(volatile u32*)(addr) = 0xf0f0f0f0;
-
- return 0;
-}
-
-extern int _amd_erase_flash_end;
-asm ("_amd_erase_flash_end:\n"
- ".long 0\n");
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- u32 (*_erase_flash_ptr)(u32 a, u32 so);
- int prot;
- int sect;
- unsigned size;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_amd_erase_flash_end - (unsigned)_amd_erase_flash;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_amd_erase_flash() routine too large (%d) %p - %p\n",
- size, &_amd_erase_flash_end, _amd_erase_flash);
- return 0;
- }
-
- memcpy(buffer, _amd_erase_flash, size);
- _erase_flash_ptr = (void*)buffer;
-
- } else {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
-
- if (info->protect[sect] == 0) { /* not protected */
- int res;
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- res = _erase_flash_ptr(info->start[0], info->start[sect]-info->start[0]);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
-
- if (res) {
- printf("Erase timed out, sector %d\n", sect);
- return res;
- }
-
- putc('.');
- }
- }
-
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int _amd_write_word(unsigned start, unsigned dest, unsigned data)
-{
- volatile u32 *addr2 = (u32*)start;
- volatile u32 *dest2 = (u32*)dest;
- volatile u32 *data2 = (u32*)&data;
- unsigned elapsed;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile u32*)dest) & (u32)data) != (u32)data) {
- return 2;
- }
-
- addr2[0x5554] = 0xAAAAAAAA;
- addr2[0xaaa8] = 0x55555555;
- addr2[0x5554] = 0xA0A0A0A0;
-
- dest2[0] = data;
-
- elapsed = sc520_mmcr->swtmrmilli; /* dummy read */
- elapsed = 0;
-
- /* data polling for D7 */
- while ((dest2[0] & 0x80808080) != (data2[0] & 0x80808080)) {
- elapsed += sc520_mmcr->swtmrmilli;
- if (elapsed > ((CONFIG_SYS_FLASH_WRITE_TOUT/CONFIG_SYS_HZ) * 1000)) {
- addr2[0] = 0xf0f0f0f0;
- return 1;
- }
- }
-
-
- addr2[0] = 0xf0f0f0f0;
-
- return 0;
-}
-
-extern int _amd_write_word_end;
-asm ("_amd_write_word_end:\n"
- ".long 0\n");
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 3 - Unsupported flash type
- */
-
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
- int flag;
- u32 (*_write_word_ptr)(unsigned start, unsigned dest, unsigned data);
- unsigned size;
-
- if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_amd_write_word_end - (unsigned)_amd_write_word;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_amd_write_word() routine too large (%d) %p - %p\n",
- size, &_amd_write_word_end, _amd_write_word);
- return 0;
- }
-
- memcpy(buffer, _amd_write_word, size);
- _write_word_ptr = (void*)buffer;
-
- } else {
- printf ("Can't program unknown flash type - aborted\n");
- return 3;
- }
-
-
- wp = (addr & ~3); /* get lower word aligned address */
-
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
- for (; i<4 && cnt>0; ++i) {
- data |= *src++ << (8*i);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
- if (rc != 0) {
- return rc;
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
-
- for (i=0; i<4; ++i) {
- data |= *src++ << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
- if (rc != 0) {
- return rc;
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return 0;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data |= *src++ << (8*i);
- --cnt;
- }
-
- for (; i<4; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- return rc;
-
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-
-ulong myflush(void);
-
-
-#define SC520_MAX_FLASH_BANKS 3
-#define SC520_FLASH_BANK0_BASE 0x38000000 /* BOOTCS */
-#define SC520_FLASH_BANK1_BASE 0x30000000 /* ROMCS0 */
-#define SC520_FLASH_BANK2_BASE 0x28000000 /* ROMCS1 */
-#define SC520_FLASH_BANKSIZE 0x8000000
-
-#define AMD29LV016_SIZE 0x200000
-#define AMD29LV016_SECTORS 32
-
-flash_info_t flash_info[SC520_MAX_FLASH_BANKS];
-
-#define CMD_READ_ARRAY 0x00F000F0
-#define CMD_UNLOCK1 0x00AA00AA
-#define CMD_UNLOCK2 0x00550055
-#define CMD_ERASE_SETUP 0x00800080
-#define CMD_ERASE_CONFIRM 0x00300030
-#define CMD_PROGRAM 0x00A000A0
-#define CMD_UNLOCK_BYPASS 0x00200020
-
-
-#define BIT_ERASE_DONE 0x00800080
-#define BIT_RDY_MASK 0x00800080
-#define BIT_PROGRAM_ERROR 0x00200020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < SC520_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
- int sectsize = 0;
- if (i==0 || i==2) {
- /* FixMe: this assumes that bank 0 and 2
- * are mapped to the two 8Mb banks */
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV016B & FLASH_TYPEMASK);
-
- flash_info[i].size = AMD29LV016_SIZE*4;
- flash_info[i].sector_count = AMD29LV016_SECTORS;
- sectsize = (AMD29LV016_SIZE*4)/AMD29LV016_SECTORS;
- } else {
- /* FixMe: this assumes that bank1 is unmapped
- * (or mapped to the same flash bank as BOOTCS) */
- flash_info[i].flash_id = 0;
- flash_info[i].size = 0;
- flash_info[i].sector_count = 0;
- sectsize=0;
- }
- memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- switch (i) {
- case 0:
- flashbase = SC520_FLASH_BANK0_BASE;
- break;
- case 1:
- flashbase = SC520_FLASH_BANK1_BASE;
- break;
- case 2:
- flashbase = SC520_FLASH_BANK0_BASE;
- break;
- default:
- panic("configured too many flash banks!\n");
- }
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = sectsize;
- flash_info[i].start[j] = flashbase + j * sectsize;
- }
- size += flash_info[i].size;
- }
-
- /*
- * Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- i386boot_start-SC520_FLASH_BANK0_BASE,
- i386boot_end-SC520_FLASH_BANK0_BASE,
- &flash_info[0]);
-
-#ifdef CONFIG_ENV_ADDR
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t *info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf("AMD: ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV016B & FLASH_TYPEMASK):
- printf("4x Amd29LV016B (16Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto done;
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- done:
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- ulong result;
- int iflag, prot, sect;
- int rc = ERR_OK;
- int chip1, chip2;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return ERR_UNKNOWN_FLASH_TYPE;
- }
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- return ERR_PROTECTED;
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- iflag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
- printf("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer();
-
- if (info->protect[sect] == 0) {
- /* not protected */
- ulong addr = info->start[sect];
-
- writel(CMD_UNLOCK1, addr + 1);
- writel(CMD_UNLOCK2, addr + 2);
- writel(CMD_ERASE_SETUP, addr + 1);
-
- writel(CMD_UNLOCK1, addr + 1);
- writel(CMD_UNLOCK2, addr + 2);
- writel(CMD_ERASE_CONFIRM, addr);
-
-
- /* wait until flash is ready */
- chip1 = chip2 = 0;
-
- do {
- result = readl(addr);
-
- /* check timeout */
- if (get_timer(0) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- writel(CMD_READ_ARRAY, addr + 1);
- chip1 = TMO;
- break;
- }
-
- if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE) {
- chip1 = READY;
- }
-
- if (!chip1 && (result & 0xFFFF) & BIT_PROGRAM_ERROR) {
- chip1 = ERR;
- }
-
- if (!chip2 && (result >> 16) & BIT_ERASE_DONE) {
- chip2 = READY;
- }
-
- if (!chip2 && (result >> 16) & BIT_PROGRAM_ERROR) {
- chip2 = ERR;
- }
-
- } while (!chip1 || !chip2);
-
- writel(CMD_READ_ARRAY, addr + 1);
-
- if (chip1 == ERR || chip2 == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
-
- if (chip1 == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf("ok.\n");
- } else { /* it was protected */
-
- printf("protected!\n");
- }
- }
-
- if (ctrlc()) {
- printf("User Interrupt!\n");
- }
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay(10000);
-
- if (iflag) {
- enable_interrupts();
- }
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_word(flash_info_t *info, ulong dest, ulong data)
-{
- ulong addr = dest;
- ulong result;
- int rc = ERR_OK;
- int iflag;
- int chip1, chip2;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = readl(addr);
- if ((result & data) != data) {
- return ERR_NOT_ERASED;
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- iflag = disable_interrupts();
-
- writel(CMD_UNLOCK1, addr + 1);
- writel(CMD_UNLOCK2, addr + 2);
- writel(CMD_UNLOCK_BYPASS, addr + 1);
- writel(addr, CMD_PROGRAM);
- writel(addr, data);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer();
-
- /* wait until flash is ready */
- chip1 = chip2 = 0;
- do {
- result = readl(addr);
-
- /* check timeout */
- if (get_timer(0) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- chip1 = ERR | TMO;
- break;
- }
-
- if (!chip1 && ((result & 0x80) == (data & 0x80))) {
- chip1 = READY;
- }
-
- if (!chip1 && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
- result = readl(addr);
-
- if ((result & 0x80) == (data & 0x80)) {
- chip1 = READY;
- } else {
- chip1 = ERR;
- }
- }
-
- if (!chip2 && ((result & (0x80 << 16)) == (data & (0x80 << 16)))) {
- chip2 = READY;
- }
-
- if (!chip2 && ((result >> 16) & BIT_PROGRAM_ERROR)) {
- result = readl(addr);
-
- if ((result & (0x80 << 16)) == (data & (0x80 << 16))) {
- chip2 = READY;
- } else {
- chip2 = ERR;
- }
- }
-
- } while (!chip1 || !chip2);
-
- writel(CMD_READ_ARRAY, addr);
-
- if (chip1 == ERR || chip2 == ERR || readl(addr) != data) {
- rc = ERR_PROG_ERROR;
- }
-
- if (iflag) {
- enable_interrupts();
- }
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return rc;
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = *((vu_long*)src);
- if ((rc = write_word(info, wp, data)) != 0) {
- return rc;
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- return write_word(info, wp, data);
-}
+++ /dev/null
-/*
- *
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/ic/sc520.h>
-#include <ali512x.h>
-#include <spi.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#undef SC520_CDP_DEBUG
-
-#ifdef SC520_CDP_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Theory:
- * We first set up all IRQs to be non-pci, edge triggered,
- * when we later enumerate the pci bus and pci_sc520_fixup_irq() gets
- * called we reallocate irqs to the pci bus with sc520_pci_set_irq()
- * as needed. Whe choose the irqs to gram from a configurable list
- * inside pci_sc520_fixup_irq() (If this list contains stupid irq's
- * such as 0 thngas will not work)
- */
-
-static void irq_init(void)
-{
- /* disable global interrupt mode */
- sc520_mmcr->picicr = 0x40;
-
- /* set all irqs to edge */
- sc520_mmcr->pic_mode[0] = 0x00;
- sc520_mmcr->pic_mode[1] = 0x00;
- sc520_mmcr->pic_mode[2] = 0x00;
-
- /* active low polarity on PIC interrupt pins,
- * active high polarity on all other irq pins */
- sc520_mmcr->intpinpol = 0x0000;
-
- /* set irq number mapping */
- sc520_mmcr->gp_tmr_int_map[0] = SC520_IRQ_DISABLED; /* disable GP timer 0 INT */
- sc520_mmcr->gp_tmr_int_map[1] = SC520_IRQ_DISABLED; /* disable GP timer 1 INT */
- sc520_mmcr->gp_tmr_int_map[2] = SC520_IRQ_DISABLED; /* disable GP timer 2 INT */
- sc520_mmcr->pit_int_map[0] = SC520_IRQ0; /* Set PIT timer 0 INT to IRQ0 */
- sc520_mmcr->pit_int_map[1] = SC520_IRQ_DISABLED; /* disable PIT timer 1 INT */
- sc520_mmcr->pit_int_map[2] = SC520_IRQ_DISABLED; /* disable PIT timer 2 INT */
- sc520_mmcr->pci_int_map[0] = SC520_IRQ_DISABLED; /* disable PCI INT A */
- sc520_mmcr->pci_int_map[1] = SC520_IRQ_DISABLED; /* disable PCI INT B */
- sc520_mmcr->pci_int_map[2] = SC520_IRQ_DISABLED; /* disable PCI INT C */
- sc520_mmcr->pci_int_map[3] = SC520_IRQ_DISABLED; /* disable PCI INT D */
- sc520_mmcr->dmabcintmap = SC520_IRQ_DISABLED; /* disable DMA INT */
- sc520_mmcr->ssimap = SC520_IRQ_DISABLED; /* disable Synchronius serial INT */
- sc520_mmcr->wdtmap = SC520_IRQ_DISABLED; /* disable Watchdog INT */
- sc520_mmcr->rtcmap = SC520_IRQ8; /* Set RTC int to 8 */
- sc520_mmcr->wpvmap = SC520_IRQ_DISABLED; /* disable write protect INT */
- sc520_mmcr->icemap = SC520_IRQ1; /* Set ICE Debug Serielport INT to IRQ1 */
- sc520_mmcr->ferrmap = SC520_IRQ13; /* Set FP error INT to IRQ13 */
-
- if (CONFIG_SYS_USE_SIO_UART) {
- sc520_mmcr->uart_int_map[0] = SC520_IRQ_DISABLED; /* disable internal UART1 INT */
- sc520_mmcr->uart_int_map[1] = SC520_IRQ_DISABLED; /* disable internal UART2 INT */
- sc520_mmcr->gp_int_map[3] = SC520_IRQ3; /* Set GPIRQ3 (ISA IRQ3) to IRQ3 */
- sc520_mmcr->gp_int_map[4] = SC520_IRQ4; /* Set GPIRQ4 (ISA IRQ4) to IRQ4 */
- } else {
- sc520_mmcr->uart_int_map[0] = SC520_IRQ4; /* Set internal UART2 INT to IRQ4 */
- sc520_mmcr->uart_int_map[1] = SC520_IRQ3; /* Set internal UART2 INT to IRQ3 */
- sc520_mmcr->gp_int_map[3] = SC520_IRQ_DISABLED; /* disable GPIRQ3 (ISA IRQ3) */
- sc520_mmcr->gp_int_map[4] = SC520_IRQ_DISABLED; /* disable GPIRQ4 (ISA IRQ4) */
- }
-
- sc520_mmcr->gp_int_map[1] = SC520_IRQ1; /* Set GPIRQ1 (SIO IRQ1) to IRQ1 */
- sc520_mmcr->gp_int_map[5] = SC520_IRQ5; /* Set GPIRQ5 (ISA IRQ5) to IRQ5 */
- sc520_mmcr->gp_int_map[6] = SC520_IRQ6; /* Set GPIRQ6 (ISA IRQ6) to IRQ6 */
- sc520_mmcr->gp_int_map[7] = SC520_IRQ7; /* Set GPIRQ7 (ISA IRQ7) to IRQ7 */
- sc520_mmcr->gp_int_map[8] = SC520_IRQ8; /* Set GPIRQ8 (SIO IRQ8) to IRQ8 */
- sc520_mmcr->gp_int_map[9] = SC520_IRQ9; /* Set GPIRQ9 (ISA IRQ2) to IRQ9 */
- sc520_mmcr->gp_int_map[0] = SC520_IRQ11; /* Set GPIRQ0 (ISA IRQ11) to IRQ10 */
- sc520_mmcr->gp_int_map[2] = SC520_IRQ12; /* Set GPIRQ2 (ISA IRQ12) to IRQ12 */
- sc520_mmcr->gp_int_map[10] = SC520_IRQ14; /* Set GPIRQ10 (ISA IRQ14) to IRQ14 */
-
- sc520_mmcr->pcihostmap = 0x11f; /* Map PCI hostbridge INT to NMI */
- sc520_mmcr->eccmap = 0x100; /* Map SDRAM ECC failure INT to NMI */
-}
-
-static void silence_uart(int port)
-{
- outb(0, port+1);
-}
-
-void setup_ali_sio(int uart_primary)
-{
- ali512x_init();
-
- ali512x_set_fdc(ALI_ENABLED, 0x3f2, 6, 0);
- ali512x_set_pp(ALI_ENABLED, 0x278, 7, 3);
- ali512x_set_uart(ALI_ENABLED, ALI_UART1, uart_primary?0x3f8:0x3e8, 4);
- ali512x_set_uart(ALI_ENABLED, ALI_UART2, uart_primary?0x2f8:0x2e8, 3);
- ali512x_set_rtc(ALI_DISABLED, 0, 0);
- ali512x_set_kbc(ALI_ENABLED, 1, 12);
- ali512x_set_cio(ALI_ENABLED);
-
- /* IrDa pins */
- ali512x_cio_function(12, 1, 0, 0);
- ali512x_cio_function(13, 1, 0, 0);
-
- /* SSI chip select pins */
- ali512x_cio_function(14, 0, 0, 0); /* SSI_CS */
- ali512x_cio_function(15, 0, 0, 0); /* SSI_MV */
- ali512x_cio_function(16, 0, 0, 0); /* SSI_SPI# */
-
- /* Board REV pins */
- ali512x_cio_function(20, 0, 0, 1);
- ali512x_cio_function(21, 0, 0, 1);
- ali512x_cio_function(22, 0, 0, 1);
- ali512x_cio_function(23, 0, 0, 1);
-}
-
-
-/* set up the ISA bus timing and system address mappings */
-static void bus_init(void)
-{
-
- /* set up the GP IO pins */
- sc520_mmcr->piopfs31_16 = 0xf7ff; /* set the GPIO pin function 31-16 reg */
- sc520_mmcr->piopfs15_0 = 0xffff; /* set the GPIO pin function 15-0 reg */
- sc520_mmcr->cspfs = 0xf8; /* set the CS pin function reg */
- sc520_mmcr->clksel = 0x70;
-
- sc520_mmcr->gpcsrt = 1; /* set the GP CS offset */
- sc520_mmcr->gpcspw = 3; /* set the GP CS pulse width */
- sc520_mmcr->gpcsoff = 1; /* set the GP CS offset */
- sc520_mmcr->gprdw = 3; /* set the RD pulse width */
- sc520_mmcr->gprdoff = 1; /* set the GP RD offset */
- sc520_mmcr->gpwrw = 3; /* set the GP WR pulse width */
- sc520_mmcr->gpwroff = 1; /* set the GP WR offset */
-
- sc520_mmcr->bootcsctl = 0x1823; /* set up timing of BOOTCS */
- sc520_mmcr->romcs1ctl = 0x1823; /* set up timing of ROMCS1 */
- sc520_mmcr->romcs2ctl = 0x1823; /* set up timing of ROMCS2 */
-
- /* adjust the memory map:
- * by default the first 256MB (0x00000000 - 0x0fffffff) is mapped to SDRAM
- * and 256MB to 1G-128k (0x1000000 - 0x37ffffff) is mapped to PCI mmio
- * we need to map 1G-128k - 1G (0x38000000 - 0x3fffffff) to CS1 */
-
-
- /* SRAM = GPCS3 128k @ d0000-effff*/
- sc520_mmcr->par[2] = 0x4e00400d;
-
- /* IDE0 = GPCS6 1f0-1f7 */
- sc520_mmcr->par[3] = 0x380801f0;
-
- /* IDE1 = GPCS7 3f6 */
- sc520_mmcr->par[4] = 0x3c0003f6;
- /* bootcs */
- sc520_mmcr->par[12] = 0x8bffe800;
- /* romcs2 */
- sc520_mmcr->par[13] = 0xcbfff000;
- /* romcs1 */
- sc520_mmcr->par[14] = 0xabfff800;
- /* 680 LEDS */
- sc520_mmcr->par[15] = 0x30000640;
-
- sc520_mmcr->adddecctl = 0;
-
- asm ("wbinvd\n"); /* Flush cache, req. after setting the unchached attribute ona PAR */
-
- if (CONFIG_SYS_USE_SIO_UART) {
- sc520_mmcr->adddecctl = sc520_mmcr->adddecctl | UART2_DIS | UART1_DIS;
- setup_ali_sio(1);
- } else {
- sc520_mmcr->adddecctl = sc520_mmcr->adddecctl & ~(UART2_DIS|UART1_DIS);
- setup_ali_sio(0);
- silence_uart(0x3e8);
- silence_uart(0x2e8);
- }
-
-}
-
-/* GPCS usage
- * GPCS0 PIO27 (NMI)
- * GPCS1 ROMCS1
- * GPCS2 ROMCS2
- * GPCS3 SRAMCS PAR2
- * GPCS4 unused PAR3
- * GPCS5 unused PAR4
- * GPCS6 IDE
- * GPCS7 IDE
- */
-
-
-/* par usage:
- * PAR0 legacy_video
- * PAR1 PCI ROM mapping
- * PAR2 SRAM
- * PAR3 IDE
- * PAR4 IDE
- * PAR5 legacy_video
- * PAR6 legacy_video
- * PAR7 legacy_video
- * PAR8 legacy_video
- * PAR9 legacy_video
- * PAR10 legacy_video
- * PAR11 ISAROM
- * PAR12 BOOTCS
- * PAR13 ROMCS1
- * PAR14 ROMCS2
- * PAR15 Port 0x680 LED display
- */
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init(void)
-{
- init_sc520();
- bus_init();
- irq_init();
-
- /* max drive current on SDRAM */
- sc520_mmcr->dsctl = 0x0100;
-
- /* enter debug mode after next reset (only if jumper is also set) */
- sc520_mmcr->rescfg = 0x08;
- /* configure the software timer to 33.333MHz */
- sc520_mmcr->swtmrcfg = 0;
- gd->bus_clk = 33333000;
-
- return 0;
-}
-
-int dram_init(void)
-{
- init_sc520_dram();
- return 0;
-}
-
-void show_boot_progress(int val)
-{
- if (val < -32) val = -1; /* let things compatible */
- outb(val&0xff, 0x80);
- outb((val&0xff00)>>8, 0x680);
-}
-
-
-int last_stage_init(void)
-{
- int minor;
- int major;
-
- major = minor = 0;
- major |= ali512x_cio_in(23)?2:0;
- major |= ali512x_cio_in(22)?1:0;
- minor |= ali512x_cio_in(21)?2:0;
- minor |= ali512x_cio_in(20)?1:0;
-
- printf("AMD SC520 CDP revision %d.%d\n", major, minor);
-
- return 0;
-}
-
-
-void ssi_chip_select(int dev)
-{
-
- /* Spunk board: SPI EEPROM is active-low, MW EEPROM and AUX are active high */
- switch (dev) {
- case 1: /* SPI EEPROM */
- ali512x_cio_out(16, 0);
- break;
-
- case 2: /* MW EEPROM */
- ali512x_cio_out(15, 1);
- break;
-
- case 3: /* AUX */
- ali512x_cio_out(14, 1);
- break;
-
- case 0:
- ali512x_cio_out(16, 1);
- ali512x_cio_out(15, 0);
- ali512x_cio_out(14, 0);
- break;
-
- default:
- printf("Illegal SSI device requested: %d\n", dev);
- }
-}
-
-void spi_eeprom_probe(int x)
-{
-}
-
-int spi_eeprom_read(int x, int offset, uchar *buffer, int len)
-{
- return 0;
-}
-
-int spi_eeprom_write(int x, int offset, uchar *buffer, int len)
-{
- return 0;
-}
-
-void spi_init_f(void)
-{
-#ifdef CONFIG_SYS_SC520_CDP_USE_SPI
- spi_eeprom_probe(1);
-#endif
-#ifdef CONFIG_SYS_SC520_CDP_USE_MW
- mw_eeprom_probe(2);
-#endif
-}
-
-ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
-{
- int offset;
- int i;
- ssize_t res;
-
- offset = 0;
- for (i=0;i<alen;i++) {
- offset <<= 8;
- offset |= addr[i];
- }
-
-#ifdef CONFIG_SYS_SC520_CDP_USE_SPI
- res = spi_eeprom_read(1, offset, buffer, len);
-#endif
-#ifdef CONFIG_SYS_SC520_CDP_USE_MW
- res = mw_eeprom_read(2, offset, buffer, len);
-#endif
-#if !defined(CONFIG_SYS_SC520_CDP_USE_SPI) && !defined(CONFIG_SYS_SC520_CDP_USE_MW)
- res = 0;
-#endif
- return res;
-}
-
-ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
-{
- int offset;
- int i;
- ssize_t res;
-
- offset = 0;
- for (i=0;i<alen;i++) {
- offset <<= 8;
- offset |= addr[i];
- }
-
-#ifdef CONFIG_SYS_SC520_CDP_USE_SPI
- res = spi_eeprom_write(1, offset, buffer, len);
-#endif
-#ifdef CONFIG_SYS_SC520_CDP_USE_MW
- res = mw_eeprom_write(2, offset, buffer, len);
-#endif
-#if !defined(CONFIG_SYS_SC520_CDP_USE_SPI) && !defined(CONFIG_SYS_SC520_CDP_USE_MW)
- res = 0;
-#endif
- return res;
-}
-
-int board_eth_init(bd_t *bis)
-{
- return pci_eth_init(bis);
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* now setup the General purpose bus to give us access to the LEDs.
- * We can then use the leds to display status information.
- */
-
-sc520_cdp_registers:
-/* size offset value */
-.word 1 ; .word 0x040 ; .long 0x00 /* SDRAM buffer control */
-.word 2 ; .word 0xc08 ; .long 0x0001 /* GP CS offset */
-.word 2 ; .word 0xc09 ; .long 0x0003 /* GP CS width */
-.word 2 ; .word 0xc0a ; .long 0x0001 /* GP CS width */
-.word 2 ; .word 0xc0b ; .long 0x0003 /* GP RD pulse width */
-.word 2 ; .word 0xc0c ; .long 0x0001 /* GP RD offse */
-.word 2 ; .word 0xc0d ; .long 0x0003 /* GP WR pulse width */
-.word 2 ; .word 0xc0e ; .long 0x0001 /* GP WR offset */
-.word 2 ; .word 0xc2c ; .long 0x0000 /* GPIO directionreg */
-.word 2 ; .word 0xc2a ; .long 0x0000 /* GPIO directionreg */
-.word 2 ; .word 0xc22 ; .long 0xffff /* GPIO pin function 31-16 reg */
-.word 2 ; .word 0xc20 ; .long 0xffff /* GPIO pin function 15-0 reg */
-.word 2 ; .word 0x0c4 ; .long 0x28000680 /* PAR 15 for access to led 680 */
-.word 0 ; .word 0x000 ; .long 0x00
-
-/* board early intialization */
-.globl early_board_init
-early_board_init:
- movl $sc520_cdp_registers,%esi
-init_loop:
- movl $0xfffef000,%edi /* MMCR base to edi */
- movw (%esi), %bx /* load sizer to bx */
- cmpw $0, %bx /* if sie is 0 we're done */
- je done
- xorl %edx,%edx
- movw 2(%esi), %dx /* load MMCR offset to dx */
- addl %edx, %edi /* add offset to base in edi */
- movl 4(%esi), %eax /* load value in eax */
- cmpw $1, %bx
- je byte /* byte op? */
- cmpw $2, %bx
- je word /* word op? */
- movl %eax, (%edi) /* must be long, then */
- jmp next
-byte: movb %al,(%edi)
- jmp next
-word: movw %ax,(%edi)
-next: addl $8, %esi /* advance esi */
- jmp init_loop
-
- /* the leds ad 0x80 and 0x680 should now work */
-done: movb $0x88, %al
- out %al, $0x80
- movw $0x680, %dx
- out %al, %dx
-
- jmp *%ebp /* return to caller */
-
-
-.globl show_boot_progress_asm
-show_boot_progress_asm:
- out %al, $0x80
- xchg %al, %ah
- movw $0x680, %dx
- out %al, %dx
- jmp *%ebp
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * 16bit initialization code.
- * This code have to map the area of the boot flash
- * that is used by U-boot to its final destination.
- */
-
-.text
-.section .start16, "ax"
-.code16
-.globl board_init16
-board_init16:
- /* Alias MMCR to 0xdf000 */
- movw $0xfffc, %dx
- movl $0x800df0cb, %eax
- outl %eax, %dx
-
- /* Set ds to point to MMCR alias */
- movw $0xdf00, %ax
- movw %ax, %ds
-
- /* Map the entire flash at 0x38000000
- * (with BOOTCS and PAR14, use 0xabfff800 for ROMCS1) */
- movl $0xc0, %edi
- movl $0x8bfff800, %eax
- movl %eax, (%di)
-
- /* Disable SDRAM write buffer */
- movw $0x40,%di
- xorw %ax,%ax
- movb %al, (%di)
-
- /* Disabe MMCR alias */
- movw $0xfffc, %dx
- movl $0x000000cb, %eax
- outl %eax, %dx
-
- /* the return address is tored in bp */
- jmp *%bp
-
-
-.section .bios, "ax"
-.code16
-.globl realmode_reset
-realmode_reset:
- /* Alias MMCR to 0xdf000 */
- movw $0xfffc, %dx
- movl $0x800df0cb, %eax
- outl %eax, %dx
-
- /* Set ds to point to MMCR alias */
- movw $0xdf00, %ax
- movw %ax, %ds
-
- /* issue software reset thorugh MMCR */
- movl $0xd72, %edi
- movb $0x01, %al
- movb %al, (%di)
-
-1: hlt
- jmp 1
+++ /dev/null
-/*
- *
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-#include <asm/ic/sc520.h>
-#include <asm/ic/pci.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#undef SC520_CDP_DEBUG
-
-#ifdef SC520_CDP_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-static void pci_sc520_cdp_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
- /* a configurable lists of irqs to steal
- * when we need one (a board with more pci interrupt pins
- * would use a larger table */
- static int irq_list[] = {
- CONFIG_SYS_FIRST_PCI_IRQ,
- CONFIG_SYS_SECOND_PCI_IRQ,
- CONFIG_SYS_THIRD_PCI_IRQ,
- CONFIG_SYS_FORTH_PCI_IRQ
- };
- static int next_irq_index=0;
-
- uchar tmp_pin;
- int pin;
-
- pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
- pin = tmp_pin;
-
- pin-=1; /* pci config space use 1-based numbering */
- if (-1 == pin) {
- return; /* device use no irq */
- }
-
-
- /* map device number + pin to a pin on the sc520 */
- switch (PCI_DEV(dev)) {
- case 20:
- pin+=SC520_PCI_INTA;
- break;
-
- case 19:
- pin+=SC520_PCI_INTB;
- break;
-
- case 18:
- pin+=SC520_PCI_INTC;
- break;
-
- case 17:
- pin+=SC520_PCI_INTD;
- break;
-
- default:
- return;
- }
-
- pin&=3; /* wrap around */
-
- if (sc520_pci_ints[pin] == -1) {
- /* re-route one interrupt for us */
- if (next_irq_index > 3) {
- return;
- }
- if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) {
- return;
- }
- next_irq_index++;
- }
-
-
- if (-1 != sc520_pci_ints[pin]) {
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE,
- sc520_pci_ints[pin]);
- }
- PRINTF("fixup_irq: device %d pin %c irq %d\n",
- PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]);
-}
-
-static struct pci_controller sc520_cdp_hose = {
- fixup_irq: pci_sc520_cdp_fixup_irq,
-};
-
-void pci_init_board(void)
-{
- pci_sc520_init(&sc520_cdp_hose);
-}
-
-/*
- * This function should map a chunk of size bytes
- * of the system address space to the ISA bus
- *
- * The function will return the memory address
- * as seen by the host (which may very will be the
- * same as the bus address)
- */
-u32 isa_map_rom(u32 bus_addr, int size)
-{
- u32 par;
-
- PRINTF("isa_map_rom asked to map %d bytes at %x\n",
- size, bus_addr);
-
- par = size;
- if (par < 0x80000) {
- par = 0x80000;
- }
- par >>= 12;
- par--;
- par&=0x7f;
- par <<= 18;
- par |= (bus_addr>>12);
- par |= 0x50000000;
-
- PRINTF ("setting PAR11 to %x\n", par);
-
- /* Map rom 0x10000 with PAR1 */
- sc520_mmcr->par[11] = par;
-
- return bus_addr;
-}
-
-/*
- * this function removed any mapping created
- * with pci_get_rom_window()
- */
-void isa_unmap_rom(u32 addr)
-{
- PRINTF("isa_unmap_rom asked to unmap %x", addr);
- if ((addr>>12) == (sc520_mmcr->par[11] & 0x3ffff)) {
- sc520_mmcr->par[11] = 0;
- PRINTF(" done\n");
- return;
- }
- PRINTF(" not ours\n");
-}
-
-#define PCI_ROM_TEMP_SPACE 0x10000
-/*
- * This function should map a chunk of size bytes
- * of the system address space to the PCI bus,
- * suitable to map PCI ROMS (bus address < 16M)
- * the function will return the host memory address
- * which should be converted into a bus address
- * before used to configure the PCI rom address
- * decoder
- */
-u32 pci_get_rom_window(struct pci_controller *hose, int size)
-{
- u32 par;
-
- par = size;
- if (par < 0x80000) {
- par = 0x80000;
- }
- par >>= 16;
- par--;
- par&=0x7ff;
- par <<= 14;
- par |= (PCI_ROM_TEMP_SPACE>>16);
- par |= 0x72000000;
-
- PRINTF ("setting PAR1 to %x\n", par);
-
- /* Map rom 0x10000 with PAR1 */
- sc520_mmcr->par[1] = par;
-
- return PCI_ROM_TEMP_SPACE;
-}
-
-/*
- * this function removed any mapping created
- * with pci_get_rom_window()
- */
-void pci_remove_rom_window(struct pci_controller *hose, u32 addr)
-{
- PRINTF("pci_remove_rom_window: %x", addr);
- if (addr == PCI_ROM_TEMP_SPACE) {
- sc520_mmcr->par[1] = 0;
- PRINTF(" done\n");
- return;
- }
- PRINTF(" not ours\n");
-
-}
-
-/*
- * This function is called in order to provide acces to the
- * legacy video I/O ports on the PCI bus.
- * After this function accesses to I/O ports 0x3b0-0x3bb and
- * 0x3c0-0x3df shuld result in transactions on the PCI bus.
- *
- */
-int pci_enable_legacy_video_ports(struct pci_controller *hose)
-{
- /* Map video memory to 0xa0000*/
- sc520_mmcr->par[0] = 0x7200400a;
-
- /* forward all I/O accesses to PCI */
- sc520_mmcr->adddecctl = sc520_mmcr->adddecctl | IO_HOLE_DEST_PCI;
-
-
- /* so we map away all io ports to pci (only way to access pci io
- * below 0x400. But then we have to map back the portions that we dont
- * use so that the generate cycles on the GPIO bus where the sio and
- * ISA slots are connected, this requre the use of several PAR registers
- */
-
- /* bring 0x100 - 0x1ef back to ISA using PAR5 */
- sc520_mmcr->par[5] = 0x30ef0100;
-
- /* IDE use 1f0-1f7 */
-
- /* bring 0x1f8 - 0x2f7 back to ISA using PAR6 */
- sc520_mmcr->par[6] = 0x30ff01f8;
-
- /* com2 use 2f8-2ff */
-
- /* bring 0x300 - 0x3af back to ISA using PAR7 */
- sc520_mmcr->par[7] = 0x30af0300;
-
- /* vga use 3b0-3bb */
-
- /* bring 0x3bc - 0x3bf back to ISA using PAR8 */
- sc520_mmcr->par[8] = 0x300303bc;
-
- /* vga use 3c0-3df */
-
- /* bring 0x3e0 - 0x3f5 back to ISA using PAR9 */
- sc520_mmcr->par[9] = 0x301503e0;
-
- /* ide use 3f6 */
-
- /* bring 0x3f7 back to ISA using PAR10 */
- sc520_mmcr->par[10] = 0x300003f7;
-
- /* com1 use 3f8-3ff */
-
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-OUTPUT_ARCH(i386)
-ENTRY(_start)
-
-SECTIONS
-{
- . = 0x387c0000; /* Where bootcode in the flash is mapped */
- .text : { *(.text); }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = 0x400000; /* Ram data segment to use */
- _i386boot_romdata_dest = ABSOLUTE(.);
- .data : AT ( LOADADDR(.rodata) + SIZEOF(.rodata) ) { *(.data) }
- _i386boot_romdata_start = LOADADDR(.data);
-
- . = ALIGN(4);
- .got : AT ( LOADADDR(.data) + SIZEOF(.data) ) { *(.got) }
- _i386boot_romdata_size = SIZEOF(.data) + SIZEOF(.got);
-
-
- . = ALIGN(4);
- _i386boot_bss_start = ABSOLUTE(.);
- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
- _i386boot_bss_size = SIZEOF(.bss);
-
-
- /* 16bit realmode trampoline code */
- .realmode 0x7c0 : AT ( LOADADDR(.got) + SIZEOF(.got) ) { *(.realmode) }
-
- _i386boot_realmode = LOADADDR(.realmode);
- _i386boot_realmode_size = SIZEOF(.realmode);
-
- /* 16bit BIOS emulation code (just enough to boot Linux) */
- .bios 0 : AT ( LOADADDR(.realmode) + SIZEOF(.realmode) ) { *(.bios) }
-
- _i386boot_bios = LOADADDR(.bios);
- _i386boot_bios_size = SIZEOF(.bios);
-
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- /* The load addresses below assumes that the flash
- * will be mapped so that 0x387f0000 == 0xffff0000
- * at reset time
- *
- * The fe00 and ff00 offsets of the start32 and start16
- * segments are arbitrary, the just have to be mapped
- * at reset and the code have to fit.
- * The fff0 offset of resetvec is important, however.
- */
-
-
- . = 0xfffffe00;
- .start32 : AT (0x387ffe00) { *(.start32); }
-
- . = 0xff00;
- .start16 : AT (0x387fff00) { *(.start16); }
-
- . = 0xfff0;
- .resetvec : AT (0x387ffff0) { *(.resetvec); }
- _i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) );
-}
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2002
-# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).a
-
-COBJS-y += sc520_spunk.o
-COBJS-y += flash.o
-COBJS-$(CONFIG_PCI) += sc520_spunk_pci.o
-SOBJS-y += sc520_spunk_asm.o
-SOBJS-y += sc520_spunk_asm16.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-#
-# (C) Copyright 2002
-# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-
-TEXT_BASE = 0x387c0000
+++ /dev/null
-/*
- * (C) Copyright 2002, 2003
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <pci.h>
-#include <asm/ic/sc520.h>
-
-#define PROBE_BUFFER_SIZE 1024
-static unsigned char buffer[PROBE_BUFFER_SIZE];
-
-#define SC520_MAX_FLASH_BANKS 1
-#define SC520_FLASH_BANK0_BASE 0x38000000 /* BOOTCS */
-#define SC520_FLASH_BANKSIZE 0x8000000
-
-#define A29LV641DH_SIZE 0x800000
-#define A29LV641DH_SECTORS 128
-
-#define A29LV641MH_SIZE 0x800000
-#define A29LV641MH_SECTORS 128
-
-#define I28F320J3A_SIZE 0x400000
-#define I28F320J3A_SECTORS 32
-
-#define I28F640J3A_SIZE 0x800000
-#define I28F640J3A_SECTORS 64
-
-#define I28F128J3A_SIZE 0x1000000
-#define I28F128J3A_SECTORS 128
-
-flash_info_t flash_info[SC520_MAX_FLASH_BANKS];
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-static u32 _probe_flash(u32 addr, u32 bw, int il)
-{
- u32 result=0;
-
- /* First do an unlock cycle for the benefit of
- * devices that need it */
-
- switch (bw) {
-
- case 1:
- *(volatile u8*)(addr+0x5555) = 0xaa;
- *(volatile u8*)(addr+0x2aaa) = 0x55;
- *(volatile u8*)(addr+0x5555) = 0x90;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0x5555), 0xf0;
- break;
-
- case 2:
- *(volatile u16*)(addr+0xaaaa) = 0xaaaa;
- *(volatile u16*)(addr+0x5554) = 0x5555;
-
- /* Issue identification command */
- if (il == 2) {
- *(volatile u16*)(addr+0xaaaa) = 0x9090;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u16*)addr = 0xffff;
- *(volatile u16*)(addr+0xaaaa), 0xf0f0;
-
- } else {
- *(volatile u8*)(addr+0xaaaa) = 0x90;
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0xaaaa), 0xf0;
- }
-
- break;
-
- case 4:
- *(volatile u32*)(addr+0x5554) = 0xaaaaaaaa;
- *(volatile u32*)(addr+0xaaa8) = 0x55555555;
-
- switch (il) {
- case 1:
- /* Issue identification command */
- *(volatile u8*)(addr+0x5554) = 0x90;
-
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0x5554), 0xf0;
- break;
-
- case 2:
- /* Issue identification command */
- *(volatile u32*)(addr + 0x5554) = 0x00900090;
-
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u32*)addr = 0x00ff00ff;
- *(volatile u32*)(addr+0x5554), 0x00f000f0;
- break;
-
- case 4:
- /* Issue identification command */
- *(volatile u32*)(addr+0x5554) = 0x90909090;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u32*)addr = 0xffffffff;
- *(volatile u32*)(addr+0x5554), 0xf0f0f0f0;
- break;
- }
- break;
- }
-
- return result;
-}
-
-extern int _probe_flash_end;
-asm ("_probe_flash_end:\n"
- ".long 0\n");
-
-static int identify_flash(unsigned address, int width)
-{
- int is;
- int device;
- int vendor;
- int size;
- unsigned res;
-
- u32 (*_probe_flash_ptr)(u32 a, u32 bw, int il);
-
- size = (unsigned)&_probe_flash_end - (unsigned)_probe_flash;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_probe_flash() routine too large (%d) %p - %p\n",
- size, &_probe_flash_end, _probe_flash);
- return 0;
- }
-
- memcpy(buffer, _probe_flash, size);
- _probe_flash_ptr = (void*)buffer;
-
- is = disable_interrupts();
- res = _probe_flash_ptr(address, width, 1);
- if (is) {
- enable_interrupts();
- }
-
- vendor = res >> 16;
- device = res & 0xffff;
-
- return res;
-}
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < SC520_MAX_FLASH_BANKS; i++) {
- unsigned id;
- ulong flashbase = 0;
- int sectsize = 0;
-
- memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- switch (i) {
- case 0:
- flashbase = SC520_FLASH_BANK0_BASE;
- break;
- default:
- panic("configured too many flash banks!\n");
- }
-
- id = identify_flash(flashbase, 2);
- switch (id) {
- case 0x000122d7:
- /* 29LV641DH */
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV640U & FLASH_TYPEMASK);
-
- flash_info[i].size = A29LV641DH_SIZE;
- flash_info[i].sector_count = A29LV641DH_SECTORS;
- sectsize = A29LV641DH_SIZE/A29LV641DH_SECTORS;
- printf("Bank %d: AMD 29LV641DH\n", i);
- break;
-
- case 0x0001227E:
- /* 29LV641MH */
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_DL640 & FLASH_TYPEMASK);
-
- flash_info[i].size = A29LV641MH_SIZE;
- flash_info[i].sector_count = A29LV641MH_SECTORS;
- sectsize = A29LV641MH_SIZE/A29LV641MH_SECTORS;
- printf("Bank %d: AMD 29LV641MH\n", i);
- break;
-
- case 0x00890016:
- /* 28F320J3A */
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F320J3A & FLASH_TYPEMASK);
-
- flash_info[i].size = I28F320J3A_SIZE;
- flash_info[i].sector_count = I28F320J3A_SECTORS;
- sectsize = I28F320J3A_SIZE/I28F320J3A_SECTORS;
- printf("Bank %d: Intel 28F320J3A\n", i);
- break;
-
- case 0x00890017:
- /* 28F640J3A */
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F640J3A & FLASH_TYPEMASK);
-
- flash_info[i].size = I28F640J3A_SIZE;
- flash_info[i].sector_count = I28F640J3A_SECTORS;
- sectsize = I28F640J3A_SIZE/I28F640J3A_SECTORS;
- printf("Bank %d: Intel 28F640J3A\n", i);
- break;
-
- case 0x00890018:
- /* 28F128J3A */
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F128J3A & FLASH_TYPEMASK);
-
- flash_info[i].size = I28F128J3A_SIZE;
- flash_info[i].sector_count = I28F128J3A_SECTORS;
- sectsize = I28F128J3A_SIZE/I28F128J3A_SECTORS;
- printf("Bank %d: Intel 28F128J3A\n", i);
- break;
-
- default:
- printf("Bank %d have unknown flash %08x\n", i, id);
- flash_info[i].flash_id = FLASH_UNKNOWN;
- continue;
- }
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase + j * sectsize;
- }
- size += flash_info[i].size;
-
- flash_protect(FLAG_PROTECT_CLEAR,
- flash_info[i].start[0],
- flash_info[i].start[0] + flash_info[i].size - 1,
- &flash_info[i]);
- }
-
- /*
- * Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- i386boot_start,
- i386boot_end,
- &flash_info[0]);
-#ifdef CONFIG_ENV_ADDR
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t *info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf("INTEL: ");
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F320J3A & FLASH_TYPEMASK):
- printf("1x I28F320J3A (32Mbit)\n");
- break;
- case (INTEL_ID_28F640J3A & FLASH_TYPEMASK):
- printf("1x I28F640J3A (64Mbit)\n");
- break;
- case (INTEL_ID_28F128J3A & FLASH_TYPEMASK):
- printf("1x I28F128J3A (128Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto done;
- break;
- }
-
- break;
-
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf("AMD: ");
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV640U & FLASH_TYPEMASK):
- printf("1x AMD29LV641DH (64Mbit)\n");
- break;
- case (AMD_ID_DL640 & FLASH_TYPEMASK):
- printf("1x AMD29LV641MH (64Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto done;
- break;
- }
-
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-done:
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static u32 _amd_erase_flash(u32 addr, u32 sector)
-{
- unsigned elapsed;
-
- /* Issue erase */
- *(volatile u16*)(addr + 0xaaaa) = 0x00AA;
- *(volatile u16*)(addr + 0x5554) = 0x0055;
- *(volatile u16*)(addr + 0xaaaa) = 0x0080;
- /* And one unlock */
- *(volatile u16*)(addr + 0xaaaa) = 0x00AA;
- *(volatile u16*)(addr + 0x5554) = 0x0055;
- /* Sector erase command comes last */
- *(volatile u16*)(addr + sector) = 0x0030;
-
- elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */
- elapsed = 0;
- while (((*(volatile u16*)(addr + sector)) & 0x0080) != 0x0080) {
-
- elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
- if (elapsed > ((CONFIG_SYS_FLASH_ERASE_TOUT/CONFIG_SYS_HZ) * 1000)) {
- *(volatile u16*)(addr) = 0x00f0;
- return 1;
- }
- }
-
- *(volatile u16*)(addr) = 0x00f0;
-
- return 0;
-}
-
-extern int _amd_erase_flash_end;
-asm ("_amd_erase_flash_end:\n"
- ".long 0\n");
-
-/* this needs to be inlined, the SWTMRMMILLI register is reset by each read */
-#define __udelay(delay) \
-{ \
- unsigned micro; \
- unsigned milli=0; \
- \
- micro = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \
- \
- for (;;) { \
- \
- milli += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \
- micro = *(volatile u16*)(0xfffef000+SC520_SWTMRMICRO); \
- \
- if ((delay) <= (micro + (milli * 1000))) { \
- break; \
- } \
- } \
-} while (0)
-
-static u32 _intel_erase_flash(u32 addr, u32 sector)
-{
- unsigned elapsed;
-
- *(volatile u16*)(addr + sector) = 0x0050; /* clear status register */
- *(volatile u16*)(addr + sector) = 0x0020; /* erase setup */
- *(volatile u16*)(addr + sector) = 0x00D0; /* erase confirm */
-
- /* Wait at least 80us - let's wait 1 ms */
- __udelay(1000);
-
- elapsed = 0;
- while (((*(volatile u16*)(addr + sector)) & 0x0080) != 0x0080) {
- elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
- if (elapsed > ((CONFIG_SYS_FLASH_ERASE_TOUT/CONFIG_SYS_HZ) * 1000)) {
- *(volatile u16*)(addr + sector) = 0x00B0; /* suspend erase */
- *(volatile u16*)(addr + sector) = 0x00FF; /* reset to read mode */
- return 1;
- }
- }
-
- *(volatile u16*)(addr + sector) = 0x00FF; /* reset to read mode */
-
- return 0;
-}
-
-extern int _intel_erase_flash_end;
-asm ("_intel_erase_flash_end:\n"
- ".long 0\n");
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- u32 (*_erase_flash_ptr)(u32 a, u32 so);
- int prot;
- int sect;
- unsigned size;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_amd_erase_flash_end - (unsigned)_amd_erase_flash;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_amd_erase_flash() routine too large (%d) %p - %p\n",
- size, &_amd_erase_flash_end, _amd_erase_flash);
- return 0;
- }
-
- memcpy(buffer, _amd_erase_flash, size);
- _erase_flash_ptr = (void*)buffer;
-
- } else if ((info->flash_id & FLASH_VENDMASK) == (INTEL_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_intel_erase_flash_end - (unsigned)_intel_erase_flash;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_intel_erase_flash() routine too large (%d) %p - %p\n",
- size, &_intel_erase_flash_end, _intel_erase_flash);
- return 0;
- }
-
- memcpy(buffer, _intel_erase_flash, size);
- _erase_flash_ptr = (void*)buffer;
- } else {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
-
- if (info->protect[sect] == 0) { /* not protected */
- int res;
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- res = _erase_flash_ptr(info->start[0], info->start[sect]-info->start[0]);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- if (res) {
- printf("Erase timed out, sector %d\n", sect);
- return res;
- }
-
- putc('.');
- }
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int _amd_write_word(unsigned start, unsigned dest, u16 data)
-{
- volatile u16 *addr2 = (volatile u16*)start;
- volatile u16 *dest2 = (volatile u16*)dest;
- volatile u16 *data2 = (volatile u16*)&data;
- int i;
- unsigned elapsed;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile u16*)dest) & (u16)data) != (u16)data) {
- return 2;
- }
-
- for (i = 0; i < 2; i++) {
-
- addr2[0x5555] = 0x00AA;
- addr2[0x2aaa] = 0x0055;
- addr2[0x5555] = 0x00A0;
-
- dest2[i] = (data >> (i*16)) & 0xffff;
-
- elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */
- elapsed = 0;
-
- /* data polling for D7 */
- while ((dest2[i] & 0x0080) != (data2[i] & 0x0080)) {
- elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
- if (elapsed > ((CONFIG_SYS_FLASH_WRITE_TOUT/CONFIG_SYS_HZ) * 1000)) {
- addr2[i] = 0x00f0;
- return 1;
- }
- }
- }
-
- addr2[i] = 0x00f0;
-
- return 0;
-}
-
-extern int _amd_write_word_end;
-asm ("_amd_write_word_end:\n"
- ".long 0\n");
-
-static int _intel_write_word(unsigned start, unsigned dest, unsigned data)
-{
- int i;
- unsigned elapsed;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile u16*)dest) & (u16)data) != (u16)data) {
- return 2;
- }
-
- for (i = 0; i < 2; i++) {
-
- *(volatile u16*)(dest+2*i) = 0x0040; /* write setup */
- *(volatile u16*)(dest+2*i) = (data >> (i*16)) & 0xffff;
-
- elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */
- elapsed = 0;
-
- /* data polling for D7 */
- while ((*(volatile u16*)dest & 0x0080) != 0x0080) {
- elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
- if (elapsed > ((CONFIG_SYS_FLASH_WRITE_TOUT/CONFIG_SYS_HZ) * 1000)) {
- *(volatile u16*)dest = 0x00ff;
- return 1;
- }
- }
- }
-
- *(volatile u16*)dest = 0x00ff;
-
-
- return 0;
-}
-
-extern int _intel_write_word_end;
-asm ("_intel_write_word_end:\n"
- ".long 0\n");
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 3 - Unsupported flash type
- */
-
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
- int flag;
- u32 (*_write_word_ptr)(unsigned start, unsigned dest, unsigned data);
- unsigned size;
-
- if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_amd_write_word_end - (unsigned)_amd_write_word;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_amd_write_word() routine too large (%d) %p - %p\n",
- size, &_amd_write_word_end, _amd_write_word);
- return 0;
- }
-
- memcpy(buffer, _amd_write_word, size);
- _write_word_ptr = (void*)buffer;
-
- } else if ((info->flash_id & FLASH_VENDMASK) == (INTEL_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_intel_write_word_end - (unsigned)_intel_write_word;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_intel_write_word() routine too large (%d) %p - %p\n",
- size, &_intel_write_word_end, _intel_write_word);
- return 0;
- }
-
- memcpy(buffer, _intel_write_word, size);
- _write_word_ptr = (void*)buffer;
- } else {
- printf ("Can't program unknown flash type - aborted\n");
- return 3;
- }
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
- for (; i<4 && cnt>0; ++i) {
- data |= *src++ << (8*i);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
- if (rc != 0) {
- return rc;
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
-
- for (i=0; i<4; ++i) {
- data |= *src++ << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
- if (rc != 0) {
- return rc;
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return 0;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data |= *src++ << (8*i);
- --cnt;
- }
-
- for (; i<4; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- return rc;
-}
+++ /dev/null
-/*
- *
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <ds1722.h>
-#include <asm/io.h>
-#include <asm/ic/sc520.h>
-#include <asm/ic/ssi.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Theory:
- * We first set up all IRQs to be non-pci, edge triggered,
- * when we later enumerate the pci bus and pci_sc520_fixup_irq() gets
- * called we reallocate irqs to the pci bus with sc520_pci_set_irq()
- * as needed. Whe choose the irqs to gram from a configurable list
- * inside pci_sc520_fixup_irq() (If this list contains stupid irq's
- * such as 0 thngas will not work)
- */
-
-static void irq_init(void)
-{
- /* disable global interrupt mode */
- sc520_mmcr->picicr = 0x40;
-
- /* set all irqs to edge */
- sc520_mmcr->pic_mode[0] = 0x00;
- sc520_mmcr->pic_mode[1] = 0x00;
- sc520_mmcr->pic_mode[2] = 0x00;
-
- /* active low polarity on PIC interrupt pins,
- * active high polarity on all other irq pins */
- sc520_mmcr->intpinpol = 0x0000;
-
- /* set irq number mapping */
- sc520_mmcr->gp_tmr_int_map[0] = SC520_IRQ_DISABLED; /* disable GP timer 0 INT */
- sc520_mmcr->gp_tmr_int_map[1] = SC520_IRQ_DISABLED; /* disable GP timer 1 INT */
- sc520_mmcr->gp_tmr_int_map[2] = SC520_IRQ_DISABLED; /* disable GP timer 2 INT */
- sc520_mmcr->pit_int_map[0] = SC520_IRQ0; /* Set PIT timer 0 INT to IRQ0 */
- sc520_mmcr->pit_int_map[1] = SC520_IRQ_DISABLED; /* disable PIT timer 1 INT */
- sc520_mmcr->pit_int_map[2] = SC520_IRQ_DISABLED; /* disable PIT timer 2 INT */
- sc520_mmcr->pci_int_map[0] = SC520_IRQ_DISABLED; /* disable PCI INT A */
- sc520_mmcr->pci_int_map[1] = SC520_IRQ_DISABLED; /* disable PCI INT B */
- sc520_mmcr->pci_int_map[2] = SC520_IRQ_DISABLED; /* disable PCI INT C */
- sc520_mmcr->pci_int_map[3] = SC520_IRQ_DISABLED; /* disable PCI INT D */
- sc520_mmcr->dmabcintmap = SC520_IRQ_DISABLED; /* disable DMA INT */
- sc520_mmcr->ssimap = SC520_IRQ6; /* Set Synchronius serial INT to IRQ6*/
- sc520_mmcr->wdtmap = SC520_IRQ_DISABLED; /* disable Watchdog INT */
- sc520_mmcr->rtcmap = SC520_IRQ8; /* Set RTC int to 8 */
- sc520_mmcr->wpvmap = SC520_IRQ_DISABLED; /* disable write protect INT */
- sc520_mmcr->icemap = SC520_IRQ1; /* Set ICE Debug Serielport INT to IRQ1 */
- sc520_mmcr->ferrmap = SC520_IRQ13; /* Set FP error INT to IRQ13 */
-
-
- sc520_mmcr->uart_int_map[0] = SC520_IRQ4; /* Set internal UART1 INT to IRQ4 */
- sc520_mmcr->uart_int_map[1] = SC520_IRQ3; /* Set internal UART2 INT to IRQ3 */
-
- sc520_mmcr->gp_int_map[0] = SC520_IRQ7; /* Set GPIRQ0 (PC-Card AUX IRQ) to IRQ7 */
- sc520_mmcr->gp_int_map[1] = SC520_IRQ14; /* Set GPIRQ1 (CF IRQ) to IRQ14 */
- sc520_mmcr->gp_int_map[3] = SC520_IRQ5; /* Set GPIRQ3 ( CAN IRQ ) ti IRQ5 */
- sc520_mmcr->gp_int_map[4] = SC520_IRQ_DISABLED; /* disbale GIRQ4 ( IRR IRQ ) */
- sc520_mmcr->gp_int_map[5] = SC520_IRQ_DISABLED; /* disable GPIRQ5 */
- sc520_mmcr->gp_int_map[6] = SC520_IRQ_DISABLED; /* disable GPIRQ6 */
- sc520_mmcr->gp_int_map[7] = SC520_IRQ_DISABLED; /* disable GPIRQ7 */
- sc520_mmcr->gp_int_map[8] = SC520_IRQ_DISABLED; /* disable GPIRQ8 */
- sc520_mmcr->gp_int_map[9] = SC520_IRQ_DISABLED; /* disable GPIRQ9 */
- sc520_mmcr->gp_int_map[2] = SC520_IRQ_DISABLED; /* disable GPIRQ2 */
- sc520_mmcr->gp_int_map[10] = SC520_IRQ_DISABLED; /* disable GPIRQ10 */
-
- sc520_mmcr->pcihostmap = 0x11f; /* Map PCI hostbridge INT to NMI */
- sc520_mmcr->eccmap = 0x100; /* Map SDRAM ECC failure INT to NMI */
-
-}
-
-/* set up the ISA bus timing and system address mappings */
-static void bus_init(void)
-{
- /* versions
- * 0 Hyglo versions 0.95 and 0.96 (large baords)
- * ?? Hyglo version 0.97 (small board)
- * 10 Spunk board
- */
- int version = sc520_mmcr->sysinfo;
-
- if (version) {
- /* set up the GP IO pins (for the Spunk board) */
- sc520_mmcr->piopfs31_16 = 0xfff0; /* set the GPIO pin function 31-16 reg */
- sc520_mmcr->piopfs15_0 = 0x000f; /* set the GPIO pin function 15-0 reg */
- sc520_mmcr->piodir31_16 = 0x000f; /* set the GPIO direction 31-16 reg */
- sc520_mmcr->piodir15_0 = 0x1ff0; /* set the GPIO direction 15-0 reg */
- sc520_mmcr->cspfs = 0xc0; /* set the CS pin function reg */
- sc520_mmcr->clksel = 0x70;
-
- sc520_mmcr->pioclr31_16 = 0x0003; /* reset SSI chip-selects */
- sc520_mmcr->pioset31_16 = 0x000c;
-
- } else {
- /* set up the GP IO pins (for the Hyglo board) */
- sc520_mmcr->piopfs31_16 = 0xffc0; /* set the GPIO pin function 31-16 reg */
- sc520_mmcr->piopfs15_0 = 0x1e7f; /* set the GPIO pin function 15-0 reg */
- sc520_mmcr->piodir31_16 = 0x003f; /* set the GPIO direction 31-16 reg */
- sc520_mmcr->piodir15_0 = 0xe180; /* set the GPIO direction 15-0 reg */
- sc520_mmcr->cspfs = 0x00; /* set the CS pin function reg */
- sc520_mmcr->clksel = 0x70;
-
- sc520_mmcr->pioclr15_0 = 0x0180; /* reset SSI chip-selects */
- }
-
- sc520_mmcr->gpcsrt = 1; /* set the GP CS offset */
- sc520_mmcr->gpcspw = 3; /* set the GP CS pulse width */
- sc520_mmcr->gpcsoff = 1; /* set the GP CS offset */
- sc520_mmcr->gprdw = 3; /* set the RD pulse width */
- sc520_mmcr->gprdoff = 1; /* set the GP RD offset */
- sc520_mmcr->gpwrw = 3; /* set the GP WR pulse width */
- sc520_mmcr->gpwroff = 1; /* set the GP WR offset */
-
- sc520_mmcr->bootcsctl = 0x0407; /* set up timing of BOOTCS */
-
- /* adjust the memory map:
- * by default the first 256MB (0x00000000 - 0x0fffffff) is mapped to SDRAM
- * and 256MB to 1G-128k (0x1000000 - 0x37ffffff) is mapped to PCI mmio
- * we need to map 1G-128k - 1G (0x38000000 - 0x3fffffff) to CS1 */
-
-
- /* bootcs */
- sc520_mmcr->par[12] = 0x8bffe800;
-
- /* IDE0 = GPCS6 1f0-1f7 */
- sc520_mmcr->par[3] = 0x380801f0;
-
- /* IDE1 = GPCS7 3f6 */
- sc520_mmcr->par[4] = 0x3c0003f6;
-
- asm ("wbinvd\n"); /* Flush cache, req. after setting the unchached attribute ona PAR */
-
- sc520_mmcr->adddecctl = sc520_mmcr->adddecctl & ~(UART2_DIS|UART1_DIS);
-
-}
-
-
-/* par usage:
- * PAR0 (legacy_video)
- * PAR1 (PCI ROM mapping)
- * PAR2
- * PAR3 IDE
- * PAR4 IDE
- * PAR5 (legacy_video)
- * PAR6
- * PAR7 (legacy_video)
- * PAR8 (legacy_video)
- * PAR9 (legacy_video)
- * PAR10
- * PAR11 (ISAROM)
- * PAR12 BOOTCS
- * PAR13
- * PAR14
- * PAR15
- */
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init(void)
-{
- init_sc520();
- bus_init();
- irq_init();
-
- /* max drive current on SDRAM */
- sc520_mmcr->dsctl = 0x0100;
-
- /* enter debug mode after next reset (only if jumper is also set) */
- sc520_mmcr->rescfg = 0x08;
- /* configure the software timer to 33.000MHz */
- sc520_mmcr->swtmrcfg = 1;
- gd->bus_clk = 33000000;
-
- return 0;
-}
-
-int dram_init(void)
-{
- init_sc520_dram();
- return 0;
-}
-
-void show_boot_progress(int val)
-{
- int version = sc520_mmcr->sysinfo;
-
- if (val < -32) val = -1; /* let things compatible */
- if (version == 0) {
- /* PIO31-PIO16 Data */
- sc520_mmcr->piodata31_16 = (sc520_mmcr->piodata31_16 & 0xffc0) | ((val&0x7e)>>1); /* 0x1f8 >> 3 */
-
- /* PIO0-PIO15 Data */
- sc520_mmcr->piodata15_0 = (sc520_mmcr->piodata15_0 & 0x1fff)| ((val&0x7)<<13);
- } else {
- /* newer boards use PIO4-PIO12 */
- /* PIO0-PIO15 Data */
-#if 0
- val = (val & 0x007) | ((val & 0x038) << 3) | ((val & 0x1c0) >> 3);
-#else
- val = (val & 0x007) | ((val & 0x07e) << 2);
-#endif
- sc520_mmcr->piodata15_0 = (sc520_mmcr->piodata15_0 & 0xe00f) | ((val&0x01ff)<<4);
- }
-}
-
-
-int last_stage_init(void)
-{
-
- int version = sc520_mmcr->sysinfo;
-
- printf("Omicron Ceti SC520 Spunk revision %x\n", version);
-
-#if 0
- if (version) {
- int x, y;
-
- printf("eeprom probe %d\n", spi_eeprom_probe(1));
-
- spi_eeprom_read(1, 0, (u8*)&x, 2);
- spi_eeprom_read(1, 1, (u8*)&y, 2);
- printf("eeprom bytes %04x%04x\n", x, y);
- x ^= 0xffff;
- y ^= 0xffff;
- spi_eeprom_write(1, 0, (u8*)&x, 2);
- spi_eeprom_write(1, 1, (u8*)&y, 2);
-
- spi_eeprom_read(1, 0, (u8*)&x, 2);
- spi_eeprom_read(1, 1, (u8*)&y, 2);
- printf("eeprom bytes %04x%04x\n", x, y);
-
- } else {
- int x, y;
-
- printf("eeprom probe %d\n", mw_eeprom_probe(1));
-
- mw_eeprom_read(1, 0, (u8*)&x, 2);
- mw_eeprom_read(1, 1, (u8*)&y, 2);
- printf("eeprom bytes %04x%04x\n", x, y);
-
- x ^= 0xffff;
- y ^= 0xffff;
- mw_eeprom_write(1, 0, (u8*)&x, 2);
- mw_eeprom_write(1, 1, (u8*)&y, 2);
-
- mw_eeprom_read(1, 0, (u8*)&x, 2);
- mw_eeprom_read(1, 1, (u8*)&y, 2);
- printf("eeprom bytes %04x%04x\n", x, y);
-
-
- }
-#endif
-
- ds1722_probe(2);
-
- return 0;
-}
-
-void ssi_chip_select(int dev)
-{
- int version = sc520_mmcr->sysinfo;
-
- if (version) {
- /* Spunk board: EEPROM and CAN are actove-low, TEMP and AUX are active high */
- switch (dev) {
- case 1: /* EEPROM */
- sc520_mmcr->pioclr31_16 = 0x0004;
- break;
-
- case 2: /* Temp Probe */
- sc520_mmcr->pioset31_16 = 0x0002;
- break;
-
- case 3: /* CAN */
- sc520_mmcr->pioclr31_16 = 0x0008;
- break;
-
- case 4: /* AUX */
- sc520_mmcr->pioset31_16 = 0x0001;
- break;
-
- case 0:
- sc520_mmcr->pioclr31_16 = 0x0003;
- sc520_mmcr->pioset31_16 = 0x000c;
- break;
-
- default:
- printf("Illegal SSI device requested: %d\n", dev);
- }
- } else {
-
- /* Globox board: Both EEPROM and TEMP are active-high */
-
- switch (dev) {
- case 1: /* EEPROM */
- sc520_mmcr->pioset15_0 = 0x0100;
- break;
-
- case 2: /* Temp Probe */
- sc520_mmcr->pioset15_0 = 0x0080;
- break;
-
- case 0:
- sc520_mmcr->pioclr15_0 = 0x0180;
- break;
-
- default:
- printf("Illegal SSI device requested: %d\n", dev);
- }
- }
-}
-
-void spi_eeprom_probe(int x)
-{
-}
-
-int spi_eeprom_read(int x, int offset, uchar *buffer, int len)
-{
- return 0;
-}
-
-int spi_eeprom_write(int x, int offset, uchar *buffer, int len)
-{
- return 0;
-}
-
-void mw_eeprom_probe(int x)
-{
-}
-
-int mw_eeprom_read(int x, int offset, uchar *buffer, int len)
-{
- return 0;
-}
-
-int mw_eeprom_write(int x, int offset, uchar *buffer, int len)
-{
- return 0;
-}
-
-void spi_init_f(void)
-{
- sc520_mmcr->sysinfo ? spi_eeprom_probe(1) : mw_eeprom_probe(1);
-
-}
-
-ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
-{
- int offset;
- int i;
-
- offset = 0;
- for (i=0;i<alen;i++) {
- offset <<= 8;
- offset |= addr[i];
- }
-
- return sc520_mmcr->sysinfo ?
- spi_eeprom_read(1, offset, buffer, len) :
- mw_eeprom_read(1, offset, buffer, len);
-}
-
-ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
-{
- int offset;
- int i;
-
- offset = 0;
- for (i=0;i<alen;i++) {
- offset <<= 8;
- offset |= addr[i];
- }
-
- return sc520_mmcr->sysinfo ?
- spi_eeprom_write(1, offset, buffer, len) :
- mw_eeprom_write(1, offset, buffer, len);
-}
-
-int board_eth_init(bd_t *bis)
-{
- return pci_eth_init(bis);
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* now setup the General purpose bus to give us access to the LEDs.
- * We can then use the leds to display status information.
- */
-
-sc520_cdp_registers:
-/* size offset value */
-.word 1 ; .word 0x040 ; .long 0x00 /* SDRAM buffer control */
-.word 2 ; .word 0xc08 ; .long 0x0001 /* GP CS offset */
-.word 2 ; .word 0xc09 ; .long 0x0003 /* GP CS width */
-.word 2 ; .word 0xc0a ; .long 0x0001 /* GP CS width */
-.word 2 ; .word 0xc0b ; .long 0x0003 /* GP RD pulse width */
-.word 2 ; .word 0xc0c ; .long 0x0001 /* GP RD offse */
-.word 2 ; .word 0xc0d ; .long 0x0003 /* GP WR pulse width */
-.word 2 ; .word 0xc0e ; .long 0x0001 /* GP WR offset */
-.word 2 ; .word 0xc2c ; .long 0x003f /* GPIO directionreg 31-16 */
-.word 2 ; .word 0xc2a ; .long 0xe000 /* GPIO directionreg 15-0 */
-.word 2 ; .word 0xc22 ; .long 0xffc0 /* GPIO pin function 31-16 reg */
-.word 2 ; .word 0xc20 ; .long 0x1fff /* GPIO pin function 15-0 reg */
-.word 0 ; .word 0x000 ; .long 0x00
-
-/* board early intialization */
-.globl early_board_init
-early_board_init:
- movl $sc520_cdp_registers,%esi
-init_loop:
- movl $0xfffef000,%edi /* MMCR base to edi */
- movw (%esi), %bx /* load size to bx */
- cmpw $0, %bx /* if size is 0 we're done */
- je done
- xorl %edx,%edx
- movw 2(%esi), %dx /* load MMCR offset to dx */
- addl %edx, %edi /* add offset to base in edi */
- movl 4(%esi), %eax /* load value in eax */
- cmpw $1, %bx
- je byte /* byte op? */
- cmpw $2, %bx
- je word /* word op? */
- movl %eax, (%edi) /* must be long, then */
- jmp next
-byte: movb %al,(%edi)
- jmp next
-word: movw %ax,(%edi)
-next: addl $8, %esi /* advance esi */
- jmp init_loop
-
- /* light all leds */
-done: movl $0xfffefc32,%edx
- movw $0000,(%edx)
-
- jmp *%ebp /* return to caller */
-
-
-.globl show_boot_progress_asm
-show_boot_progress_asm:
- movl $0xfffefc32,%edx
- xorw $0xffff, %ax
- movw %ax,(%edx)
- jmp *%ebp
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * 16bit initialization code.
- * This code have to map the area of the boot flash
- * that is used by U-boot to its final destination.
- */
-
-.text
-.section .start16, "ax"
-.code16
-.globl board_init16
-board_init16:
- /* Alias MMCR to 0xdf000 */
- movw $0xfffc, %dx
- movl $0x800df0cb, %eax
- outl %eax, %dx
-
- /* Set ds to point to MMCR alias */
- movw $0xdf00, %ax
- movw %ax, %ds
-
- /* Map the entire flash at 0x38000000
- * (with BOOTCS and PAR14, use 0xabfff800 for ROMCS1) */
- movl $0xc0, %edi
- movl $0x8bfff800, %eax
- movl %eax, (%di)
-
- /* Disable SDRAM write buffer */
- movw $0x40,%di
- xorw %ax,%ax
- movb %al, (%di)
-
- /* Disabe MMCR alias */
- movw $0xfffc, %dx
- movl $0x000000cb, %eax
- outl %eax, %dx
-
- /* the return address is stored in bp */
- jmp *%bp
-
-
-.section .bios, "ax"
-.code16
-.globl realmode_reset
-realmode_reset:
- /* Alias MMCR to 0xdf000 */
- movw $0xfffc, %dx
- movl $0x800df0cb, %eax
- outl %eax, %dx
-
- /* Set ds to point to MMCR alias */
- movw $0xdf00, %ax
- movw %ax, %ds
-
- /* issue software reset thorugh MMCR */
- movl $0xd72, %edi
- movb $0x01, %al
- movb %al, (%di)
-
-1: hlt
- jmp 1
+++ /dev/null
-/*
- *
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <ds1722.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-#include <asm/ic/sc520.h>
-#include <asm/ic/pci.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static void pci_sc520_spunk_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
- int version = sc520_mmcr->sysinfo;
-
- /* a configurable lists of irqs to steal
- * when we need one (a board with more pci interrupt pins
- * would use a larger table */
- static int irq_list[] = {
- CONFIG_SYS_FIRST_PCI_IRQ,
- CONFIG_SYS_SECOND_PCI_IRQ,
- CONFIG_SYS_THIRD_PCI_IRQ,
- CONFIG_SYS_FORTH_PCI_IRQ
- };
- static int next_irq_index=0;
-
- uchar tmp_pin;
- int pin;
-
- pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
- pin = tmp_pin;
-
- pin-=1; /* pci config space use 1-based numbering */
- if (-1 == pin) {
- return; /* device use no irq */
- }
-
-
- /* map device number + pin to a pin on the sc520 */
- switch (PCI_DEV(dev)) {
- case 6: /* ETH0 */
- pin+=SC520_PCI_INTA;
- break;
-
- case 7: /* ETH1 */
- pin+=SC520_PCI_INTB;
- break;
-
- case 8: /* Crypto */
- pin+=SC520_PCI_INTC;
- break;
-
- case 9: /* PMC slot */
- pin+=SC520_PCI_INTD;
- break;
-
- case 10: /* PC-Card */
-
- if (version < 10) {
- pin+=SC520_PCI_INTD;
- } else {
- pin+=SC520_PCI_INTC;
- }
- break;
-
- default:
- return;
- }
-
- pin&=3; /* wrap around */
-
- if (sc520_pci_ints[pin] == -1) {
- /* re-route one interrupt for us */
- if (next_irq_index > 3) {
- return;
- }
- if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) {
- return;
- }
- next_irq_index++;
- }
-
-
- if (-1 != sc520_pci_ints[pin]) {
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE,
- sc520_pci_ints[pin]);
- }
-#if 0
- printf("fixup_irq: device %d pin %c irq %d\n",
- PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]);
-#endif
-}
-
-
-static void pci_sc520_spunk_configure_cardbus(struct pci_controller *hose,
- pci_dev_t dev, struct pci_config_table *te)
-{
- u32 io_base;
- u32 temp;
-
- pciauto_config_device(hose, dev);
-
- pci_hose_write_config_word(hose, dev, PCI_COMMAND, 0x07); /* enable device */
- pci_hose_write_config_byte(hose, dev, 0x0c, 0x10); /* cacheline size */
- pci_hose_write_config_byte(hose, dev, 0x0d, 0x40); /* latency timer */
- pci_hose_write_config_byte(hose, dev, 0x1b, 0x40); /* cardbus latency timer */
- pci_hose_write_config_word(hose, dev, PCI_BRIDGE_CONTROL, 0x0040); /* reset cardbus */
- pci_hose_write_config_word(hose, dev, PCI_BRIDGE_CONTROL, 0x0080); /* route interrupts though ExCA */
- pci_hose_write_config_word(hose, dev, 0x44, 0x3e0); /* map legacy I/O port to 0x3e0 */
-
- pci_hose_read_config_dword(hose, dev, 0x80, &temp); /* System control */
- pci_hose_write_config_dword(hose, dev, 0x80, temp | 0x60); /* System control: disable clockrun */
- /* route MF0 to ~INT and MF3 to IRQ7
- * reserve all others */
- pci_hose_write_config_dword(hose, dev, 0x8c, 0x00007002);
- pci_hose_write_config_byte(hose, dev, 0x91, 0x00); /* card control */
- pci_hose_write_config_byte(hose, dev, 0x92, 0x62); /* device control */
-
- if (te->device != 0xac56) {
- pci_hose_write_config_byte(hose, dev, 0x93, 0x21); /* async interrupt enable */
- pci_hose_write_config_word(hose, dev, 0xa8, 0x0000); /* reset GPIO */
- pci_hose_write_config_word(hose, dev, 0xac, 0x0000); /* reset GPIO */
- pci_hose_write_config_word(hose, dev, 0xaa, 0x0000); /* reset GPIO */
- pci_hose_write_config_word(hose, dev, 0xae, 0x0000); /* reset GPIO */
- } else {
- pci_hose_write_config_byte(hose, dev, 0x93, 0x20); /* */
- }
- pci_hose_write_config_word(hose, dev, 0xa4, 0x8000); /* reset power management */
-
-
- pci_hose_read_config_dword(hose, dev, PCI_BASE_ADDRESS_0, &io_base);
- io_base &= ~0xfL;
-
- writeb(0x07, io_base+0x803); /* route CSC irq though ExCA and enable IRQ7 */
- writel(0, io_base+0x10); /* CLKRUN default */
- writel(0, io_base+0x20); /* CLKRUN default */
-
-}
-
-
-static struct pci_config_table pci_sc520_spunk_config_table[] = {
- { 0x104c, 0xac50, PCI_ANY_ID, 0, 0x0a, 0, pci_sc520_spunk_configure_cardbus, { 0, 0, 0} },
- { 0x104c, 0xac56, PCI_ANY_ID, 0, 0x0a, 0, pci_sc520_spunk_configure_cardbus, { 0, 0, 0} },
- { 0, 0, 0, 0, 0, 0, NULL, {0,0,0}}
-};
-
-static struct pci_controller sc520_spunk_hose = {
- fixup_irq: pci_sc520_spunk_fixup_irq,
- config_table: pci_sc520_spunk_config_table,
- first_busno: 0x00,
- last_busno: 0xff,
-};
-
-void pci_init_board(void)
-{
- pci_sc520_init(&sc520_spunk_hose);
-}
-
-/*
- * This function should map a chunk of size bytes
- * of the system address space to the ISA bus
- *
- * The function will return the memory address
- * as seen by the host (which may very will be the
- * same as the bus address)
- */
-u32 isa_map_rom(u32 bus_addr, int size)
-{
- u32 par;
-
- printf("isa_map_rom asked to map %d bytes at %x\n",
- size, bus_addr);
-
- par = size;
- if (par < 0x80000) {
- par = 0x80000;
- }
- par >>= 12;
- par--;
- par&=0x7f;
- par <<= 18;
- par |= (bus_addr>>12);
- par |= 0x50000000;
-
- printf ("setting PAR11 to %x\n", par);
-
- /* Map rom 0x10000 with PAR1 */
- sc520_mmcr->par[11] = par;
-
- return bus_addr;
-}
-
-/*
- * this function removed any mapping created
- * with pci_get_rom_window()
- */
-void isa_unmap_rom(u32 addr)
-{
- printf("isa_unmap_rom asked to unmap %x", addr);
- if ((addr>>12) == (sc520_mmcr->par[11] & 0x3ffff)) {
- sc520_mmcr->par[11] = 0;
- printf(" done\n");
- return;
- }
- printf(" not ours\n");
-}
-
-#define PCI_ROM_TEMP_SPACE 0x10000
-/*
- * This function should map a chunk of size bytes
- * of the system address space to the PCI bus,
- * suitable to map PCI ROMS (bus address < 16M)
- * the function will return the host memory address
- * which should be converted into a bus address
- * before used to configure the PCI rom address
- * decoder
- */
-u32 pci_get_rom_window(struct pci_controller *hose, int size)
-{
- u32 par;
-
- par = size;
- if (par < 0x80000) {
- par = 0x80000;
- }
- par >>= 16;
- par--;
- par&=0x7ff;
- par <<= 14;
- par |= (PCI_ROM_TEMP_SPACE>>16);
- par |= 0x72000000;
-
- printf ("setting PAR1 to %x\n", par);
-
- /* Map rom 0x10000 with PAR1 */
- sc520_mmcr->par[1] = par;
-
- return PCI_ROM_TEMP_SPACE;
-}
-
-/*
- * this function removed any mapping created
- * with pci_get_rom_window()
- */
-void pci_remove_rom_window(struct pci_controller *hose, u32 addr)
-{
- printf("pci_remove_rom_window: %x", addr);
- if (addr == PCI_ROM_TEMP_SPACE) {
- sc520_mmcr->par[1] = 0;
- printf(" done\n");
- return;
- }
- printf(" not ours\n");
-
-}
-
-/*
- * This function is called in order to provide acces to the
- * legacy video I/O ports on the PCI bus.
- * After this function accesses to I/O ports 0x3b0-0x3bb and
- * 0x3c0-0x3df shuld result in transactions on the PCI bus.
- *
- */
-int pci_enable_legacy_video_ports(struct pci_controller *hose)
-{
- /* Map video memory to 0xa0000*/
- sc520_mmcr->par[0] = 0x7200400a;
-
- /* forward all I/O accesses to PCI */
- sc520_mmcr->adddecctl = sc520_mmcr->adddecctl | IO_HOLE_DEST_PCI;
-
-
- /* so we map away all io ports to pci (only way to access pci io
- * below 0x400. But then we have to map back the portions that we dont
- * use so that the generate cycles on the GPIO bus where the sio and
- * ISA slots are connected, this requre the use of several PAR registers
- */
-
- /* bring 0x100 - 0x2f7 back to ISA using PAR5 */
- sc520_mmcr->par[5] = 0x31f70100;
-
- /* com2 use 2f8-2ff */
-
- /* bring 0x300 - 0x3af back to ISA using PAR7 */
- sc520_mmcr->par[7] = 0x30af0300;
-
- /* vga use 3b0-3bb */
-
- /* bring 0x3bc - 0x3bf back to ISA using PAR8 */
- sc520_mmcr->par[8] = 0x300303bc;
-
- /* vga use 3c0-3df */
-
- /* bring 0x3e0 - 0x3f7 back to ISA using PAR9 */
- sc520_mmcr->par[9] = 0x301703e0;
-
- /* com1 use 3f8-3ff */
-
- return 0;
-}
+++ /dev/null
-
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-OUTPUT_ARCH(i386)
-ENTRY(_start)
-
-SECTIONS
-{
- . = 0x387c0000; /* Where bootcode in the flash is mapped */
- .text : { *(.text); }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = 0x400000; /* Ram data segment to use */
- _i386boot_romdata_dest = ABSOLUTE(.);
- .data : AT ( LOADADDR(.rodata) + SIZEOF(.rodata) ) { *(.data) }
- _i386boot_romdata_start = LOADADDR(.data);
-
- . = ALIGN(4);
- .got : AT ( LOADADDR(.data) + SIZEOF(.data) ) { *(.got) }
- _i386boot_romdata_size = SIZEOF(.data) + SIZEOF(.got);
-
-
- . = ALIGN(4);
- _i386boot_bss_start = ABSOLUTE(.);
- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
- _i386boot_bss_size = SIZEOF(.bss);
-
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- /* 16bit realmode trampoline code */
- .realmode 0x7c0 : AT ( LOADADDR(.got) + SIZEOF(.got) ) { *(.realmode) }
-
- _i386boot_realmode = LOADADDR(.realmode);
- _i386boot_realmode_size = SIZEOF(.realmode);
-
- /* 16bit BIOS emulation code (just enough to boot Linux) */
- .bios 0 : AT ( LOADADDR(.realmode) + SIZEOF(.realmode) ) { *(.bios) }
-
- _i386boot_bios = LOADADDR(.bios);
- _i386boot_bios_size = SIZEOF(.bios);
-
-
- /* The load addresses below assumes that the flash
- * will be mapped so that 0x387f0000 == 0xffff0000
- * at reset time
- *
- * The fe00 and ff00 offsets of the start32 and start16
- * segments are arbitrary, the just have to be mapped
- * at reset and the code have to fit.
- * The fff0 offset of resetvec is important, however.
- */
-
-
- . = 0xfffffe00;
- .start32 : AT (0x387ffe00) { *(.start32); }
-
- . = 0xff00;
- .start16 : AT (0x387fff00) { *(.start16); }
-
- . = 0xfff0;
- .resetvec : AT (0x387ffff0) { *(.resetvec); }
- _i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) );
-}
ip04 blackfin blackfin
tcm-bf518 blackfin blackfin
tcm-bf537 blackfin blackfin
-sc520_cdp i386 i386 - - sc520
-sc520_spunk i386 i386 - - sc520
-sc520_spunk_rel i386 i386 sc520_spunk_rel - sc520
M5208EVBE m68k mcf52x2 m5208evbe freescale
M5249EVB m68k mcf52x2 m5249evb freescale
M5253DEMO m68k mcf52x2 m5253demo freescale
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_SKIP_RELOCATE_UBOOT
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_X86 1 /* This is a X86 CPU */
-#define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */
-#define CONFIG_ALI152X 1 /* Include support for Ali 152x SIO */
-
-#define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */
-#define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
-#define CONFIG_SYS_SDRAM_RAS_CAS_DELAY 3 /* 3T */
-
-/* define at most one of these */
-#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
-#define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
-
-#define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */
-#undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */
-#undef CONFIG_SYS_SC520_TIMER /* use SC520 swtimers */
-#define CONFIG_SYS_GENERIC_TIMER 1 /* use the i8254 PIT timers */
-#undef CONFIG_SYS_TSC_TIMER /* use the Pentium TSC timers */
-#define CONFIG_SYS_USE_SIO_UART 0 /* prefer the uarts on the SIO to those
- * in the SC520 on the CDP */
-#define CONFIG_SYS_PCAT_INTERRUPTS
-#define CONFIG_SYS_NUM_IRQS 16
-
-#define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */
-
-#define CONFIG_SHOW_BOOT_PROGRESS 1
-#define CONFIG_LAST_STAGE_INIT 1
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-#define CONFIG_BAUDRATE 9600
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_SATA
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_EEPROM
-
-#define CONFIG_BOOTDELAY 15
-#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
-/* #define CONFIG_BOOTCOMMAND "bootm 38000000" */
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-
-#define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */
-
- /* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of DRAM */
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-#define CONFIG_SPI_EEPROM /* Support for SPI EEPROMs (AT25128) */
-#define CONFIG_MW_EEPROM /* Support for MicroWire EEPROMs (AT93LC46) */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Environment in EEPROM */
-#define CONFIG_ENV_IS_IN_EEPROM 1
-#define CONFIG_SPI
-#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment EEPROM 16k is SPI is used or 128 bytes if MW is used*/
-#define CONFIG_ENV_OFFSET 0
-#define CONFIG_SYS_SC520_CDP_USE_SPI /* Store configuration in the SPI part */
-#undef CONFIG_SYS_SC520_CDP_USE_MW /* Store configuration in the MicroWire part */
-#define CONFIG_SPI_X 1
-
-/*
- * JFFS2 partitions
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV "nor0"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00000000
-
-/* mtdparts command line support */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT "nor0=SC520CDP Flash Bank #0"
-#define MTDPARTS_DEFAULT "mtdparts=SC520CDP Flash Bank #0:-(jffs2)"
-*/
-
-/*-----------------------------------------------------------------------
- * Device drivers
- */
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
-#define CONFIG_PCNET
-#define CONFIG_PCNET_79C973
-#define CONFIG_PCNET_79C975
-#define PCNET_HAS_PROM 1
-
-/************************************************************
-*SATA/Native Stuff
-************************************************************/
-#define CONFIG_SYS_SATA_MAXBUS 2 /*Max Sata buses supported */
-#define CONFIG_SYS_SATA_DEVS_PER_BUS 2 /*Max no. of devices per bus/port */
-#define CONFIG_SYS_SATA_MAX_DEVICE (CONFIG_SYS_SATA_MAXBUS* CONFIG_SYS_SATA_DEVS_PER_BUS)
-#define CONFIG_ATA_PIIX 1 /*Supports ata_piix driver */
-
-
-/************************************************************
- * DISK Partition support
- ************************************************************/
-#define CONFIG_DOS_PARTITION
-#define CONFIG_MAC_PARTITION
-#define CONFIG_ISO_PARTITION /* Experimental */
-
-/************************************************************
- * Video/Keyboard support
- ************************************************************/
-#define CONFIG_VIDEO /* To enable video controller support */
-#define PCI_VIDEO_VENDOR_ID 0 /*Use the appropriate vendor ID*/
-#define PCI_VIDEO_DEVICE_ID 0 /*Use the appropriate Device ID*/
-#define CONFIG_I8042_KBD
-#define CONFIG_SYS_ISA_IO 0
-
-/************************************************************
- * RTC
- ***********************************************************/
-#define CONFIG_RTC_MC146818
-#undef CONFIG_WATCHDOG /* watchdog disabled */
-
-/*
- * PCI stuff
- */
-#define CONFIG_PCI /* include pci support */
-#define CONFIG_PCI_PNP /* pci plug-and-play */
-#define CONFIG_PCI_SCAN_SHOW
-
-#define CONFIG_SYS_FIRST_PCI_IRQ 10
-#define CONFIG_SYS_SECOND_PCI_IRQ 9
-#define CONFIG_SYS_THIRD_PCI_IRQ 11
-#define CONFIG_SYS_FORTH_PCI_IRQ 15
-
-
-#endif /* __CONFIG_H */
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_SKIP_RELOCATE_UBOOT
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_X86 1 /* This is a X86 CPU */
-#define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */
-#define CONFIG_SYS_SC520_SSI
-
-#define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */
-#define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
-#define CONFIG_SYS_SDRAM_RAS_CAS_DELAY 3 /* 3T */
-
-/* define at most one of these */
-#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
-#define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
-
-#define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */
-#undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */
-#undef CONFIG_SYS_SC520_TIMER /* use SC520 swtimers */
-#define CONFIG_SYS_GENERIC_TIMER 1 /* use the i8254 PIT timers */
-#undef CONFIG_SYS_TSC_TIMER /* use the Pentium TSC timers */
-#define CONFIG_SYS_PCAT_INTERRUPTS
-#define CONFIG_SYS_NUM_IRQS 16
-
-#define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */
-
-#define CONFIG_SHOW_BOOT_PROGRESS 1
-#define CONFIG_LAST_STAGE_INIT 1
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-
-#define CONFIG_BAUDRATE 9600
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_PCMCIA
-#define CONFIG_CMD_EEPROM
-
-
-#define CONFIG_BOOTDELAY 15
-#define CONFIG_BOOTARGS "root=/dev/mtdblock1 console=ttyS0,9600 " \
- "mtdparts=phys:7936k(root),256k(uboot) "
-#define CONFIG_BOOTCOMMAND "setenv bootargs root=/dev/nfs ip=autoconf " \
- "console=ttyS0,9600 " \
- "mtdparts=phys:7808k(root),128k(env),256k(uboot);" \
- "bootp;bootm"
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
-#endif
-
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-
-#define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */
-
- /* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of DRAM */
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-
-
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-
-#define CONFIG_SPI_EEPROM /* SPI EEPROMs such as AT25010 or AT25640 */
-#define CONFIG_MW_EEPROM /* MicroWire EEPROMS such as AT93LC46 */
-#define CONFIG_DTT_DS1722 /* Dallas DS1722 SPI Temperature probe */
-
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-
-#if 0
-/* Environment in flash */
-#define CONFIG_ENV_IS_IN_FLASH 1
-# define CONFIG_ENV_ADDR (0x387a0000) /* Addr of Environment Sector */
-# define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector (or 0x10000) */
-# define CONFIG_ENV_OFFSET 0
-
-#else
-/* Environment in EEPROM */
-
-# define CONFIG_ENV_IS_IN_EEPROM 1
-# define CONFIG_SPI
-# define CONFIG_SPI_X 1
-# define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment EEPROM */
-# define CONFIG_ENV_OFFSET 0x1c00
-
-#endif
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV "nor0"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00000000
-
-/* mtdparts command line support */
-/* Note: fake mtd_id used, no linux mtd map file */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT "nor0=sc520_spunk-0"
-#define MTDPARTS_DEFAULT "mtdparts=sc520_spunk-0:-(jffs2)"
-*/
-
-/*-----------------------------------------------------------------------
- * Device drivers
- */
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
-#define CONFIG_EEPRO100
-#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
-
-/************************************************************
- * IDE/ATA stuff
- ************************************************************/
-#define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */
-#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
-#define CONFIG_SYS_ATA_BASE_ADDR 0
-#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 /* ide0 offset */
-#define CONFIG_SYS_ATA_IDE1_OFFSET 0xe000 /* ide1 offset */
-#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */
-#define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */
-#define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */
-
-#define CONFIG_SYS_FIRST_PCMCIA_BUS 1
-
-#undef CONFIG_IDE_LED /* no led for ide supported */
-#undef CONFIG_IDE_RESET /* reset for ide unsupported... */
-#undef CONFIG_IDE_RESET_ROUTINE /* no special reset function */
-
-#define CONFIG_IDE_TI_CARDBUS
-#define CONFIG_SYS_PCMCIA_CIS_WIN 0x27f00000
-#define CONFIG_SYS_PCMCIA_CIS_WIN_SIZE 0x00100000
-#define CONFIG_SYS_PCMCIA_IO_WIN 0xe000
-#define CONFIG_SYS_PCMCIA_IO_WIN_SIZE 16
-#define CONFIG_PCMCIA_SLOT_A /* TODO: Check this */
-
-/************************************************************
- * DISK Partition support
- ************************************************************/
-#define CONFIG_DOS_PARTITION
-#define CONFIG_MAC_PARTITION
-#define CONFIG_ISO_PARTITION /* Experimental */
-
-
-/************************************************************
- * RTC
- ***********************************************************/
-#define CONFIG_RTC_MC146818
-#undef CONFIG_WATCHDOG /* watchdog disabled */
-
-/*
- * PCI stuff
- */
-#define CONFIG_PCI /* include pci support */
-#define CONFIG_PCI_PNP /* pci plug-and-play */
-#define CONFIG_PCI_SCAN_SHOW
-
-#define CONFIG_SYS_FIRST_PCI_IRQ 9
-#define CONFIG_SYS_SECOND_PCI_IRQ 10
-#define CONFIG_SYS_THIRD_PCI_IRQ 11
-#define CONFIG_SYS_FORTH_PCI_IRQ 12
-
-#endif /* __CONFIG_H */
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _outer_config
-#define _outer_config
-
-#include "sc520_spunk.h"
-
-#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND "fsload boot/vmlinuz ; bootm"
-
-#endif
projects / u-boot.git / commitdiff