]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: imx6: disable bandgap self-bias after boot
authorPeng Fan <Peng.Fan@freescale.com>
Thu, 15 Jan 2015 06:22:32 +0000 (14:22 +0800)
committerStefano Babic <sbabic@denx.de>
Tue, 17 Feb 2015 09:42:53 +0000 (10:42 +0100)
The self-bias circuit is used by the bandgap during startup.
Once the bandgap has stabilized, the self-bias circuit should
be disabled for best noise performance of analog blocks.
Also this bit should be disabled before the chip enters STOP mode or
when ever the regular bandgap is disabled.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
arch/arm/cpu/armv7/mx6/soc.c
arch/arm/include/asm/arch-mx6/crm_regs.h

index e599a12b3a57789f4c2830ab0f7aa218d9cdf234..df4e824355b5dced3257fab1aead7bb86727162a 100644 (file)
@@ -255,6 +255,23 @@ static void clear_mmdc_ch_mask(void)
        writel(0, &mxc_ccm->ccdr);
 }
 
+static void init_bandgap(void)
+{
+       struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+       /*
+        * Ensure the bandgap has stabilized.
+        */
+       while (!(readl(&anatop->ana_misc0) & 0x80))
+               ;
+       /*
+        * For best noise performance of the analog blocks using the
+        * outputs of the bandgap, the reftop_selfbiasoff bit should
+        * be set.
+        */
+       writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
+}
+
+
 #ifdef CONFIG_MX6SL
 static void set_preclk_from_osc(void)
 {
@@ -274,6 +291,13 @@ int arch_cpu_init(void)
        /* Need to clear MMDC_CHx_MASK to make warm reset work. */
        clear_mmdc_ch_mask();
 
+       /*
+        * Disable self-bias circuit in the analog bandap.
+        * The self-bias circuit is used by the bandgap during startup.
+        * This bit should be set after the bandgap has initialized.
+        */
+       init_bandgap();
+
        /*
         * When low freq boot is enabled, ROM will not set AHB
         * freq, so we need to ensure AHB freq is 132MHz in such
index 39f3c0707b8ee38eb9eda7e891a64e9f913298cc..0592ce01714f492fa7f7893e8c638d9baf9619d4 100644 (file)
@@ -1063,4 +1063,6 @@ struct mxc_ccm_reg {
 #define BF_ANADIG_PFD_528_PFD0_FRAC(v)  \
        (((v) << 0) & BM_ANADIG_PFD_528_PFD0_FRAC)
 
+#define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF 0x00000008
+
 #endif /*__ARCH_ARM_MACH_MX6_CCM_REGS_H__ */