sysreset: socfpga: gen5: add sysreset driver

This adds a UCLASS_SYSRESET sysreset driver for socfgpa gen5.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index bc67c499657f5067faff76bc3be009bb09048c00..8031cc92f55dce9202c3826eff964b780ca903ad 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -94,6 +94,7 @@ M:    Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
 S:     Maintainted
 T:     git https://gitlab.denx.de/u-boot/custodians/u-boot-socfpga.git
 F:     arch/arm/mach-socfpga/
+F:     drivers/sysreset/sysreset_socfpga.c
 
 ARM AMLOGIC SOC SUPPORT
 M:     Neil Armstrong <narmstrong@baylibre.com>

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 30aed2c4c1547b475ec0bdd6665b1beefc0ca371..6b4bec12ad851fc2d99dab809eec72b3aa26aef4 100644 (file)
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -54,6 +54,13 @@ config SYSRESET_PSCI
          Enable PSCI SYSTEM_RESET function call.  To use this, PSCI firmware
          must be running on your system.
 
+config SYSRESET_SOCFPGA
+       bool "Enable support for Intel SOCFPGA family"
+       depends on ARCH_SOCFPGA && (TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10)
+       help
+         This enables the system reset driver support for Intel SOCFPGA SoCs
+         (Cyclone 5, Arria 5 and Arria 10).
+
 config SYSRESET_TI_SCI
        bool "TI System Control Interface (TI SCI) system reset driver"
        depends on TI_SCI_PROTOCOL

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 8e1c845dfefeca6341d1274cacb03ea5c43e3982..180e46301d2dd2a03adba28174c96d84080c5e2d 100644 (file)
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
 obj-$(CONFIG_SYSRESET_MCP83XX) += sysreset_mpc83xx.o
 obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
+obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
 obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o

diff --git a/drivers/sysreset/sysreset_socfpga.c b/drivers/sysreset/sysreset_socfpga.c
new file mode 100644 (file)
index 0000000..d6c26a5
--- /dev/null
+++ b/drivers/sysreset/sysreset_socfpga.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Pepperl+Fuchs
+ * Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/reset_manager.h>
+
+struct socfpga_sysreset_data {
+       struct socfpga_reset_manager *rstmgr_base;
+};
+
+static int socfpga_sysreset_request(struct udevice *dev,
+                                   enum sysreset_t type)
+{
+       struct socfpga_sysreset_data *data = dev_get_priv(dev);
+
+       switch (type) {
+       case SYSRESET_WARM:
+               writel(BIT(RSTMGR_CTRL_SWWARMRSTREQ_LSB),
+                      &data->rstmgr_base->ctrl);
+               break;
+       case SYSRESET_COLD:
+               writel(BIT(RSTMGR_CTRL_SWCOLDRSTREQ_LSB),
+                      &data->rstmgr_base->ctrl);
+               break;
+       default:
+               return -EPROTONOSUPPORT;
+       }
+       return -EINPROGRESS;
+}
+
+static int socfpga_sysreset_probe(struct udevice *dev)
+{
+       struct socfpga_sysreset_data *data = dev_get_priv(dev);
+
+       data->rstmgr_base = devfdt_get_addr_ptr(dev);
+       return 0;
+}
+
+static struct sysreset_ops socfpga_sysreset = {
+       .request = socfpga_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_socfpga) = {
+       .id     = UCLASS_SYSRESET,
+       .name   = "socfpga_sysreset",
+       .priv_auto_alloc_size = sizeof(struct socfpga_sysreset_data),
+       .ops    = &socfpga_sysreset,
+       .probe  = socfpga_sysreset_probe,
+};