arm: mach-omap2: am33xx: ddr: update value for ext_phy_ctrl_36

for suspend/resume robustness

update value for ext_phy_ctrl_36 for suspend/resume robustness
with hardware leveling enabled.

Match recommended values from EMIF Tools app note:

http://www.ti.com/lit/an/sprac70/sprac70.pdf

Signed-off-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>

diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index c70b6fe31b0d8705ec05e4f2810989cb5058c828..3fd1d086ff142473fce73dd46952dc25a42dad40 100644 (file)
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -311,8 +311,8 @@ static void ext_phy_settings_hwlvl(const struct emif_regs *regs, int nr)
        writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_34_shdw);
        writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_35);
        writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_35_shdw);
-       writel(0x000000FF, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36);
-       writel(0x000000FF, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw);
+       writel(0x00000077, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36);
+       writel(0x00000077, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw);
 
        /*
         * Sequence to ensure that the PHY is again in a known state after