Update SVR numbers to expand support

FSL has taken to using SVR[16:23] as an SOC sub-version field.  This
is used to distinguish certain variants within an SOC family.  To
account for this, we add the SVR_SOC_VER() macro, and update the SVR_*
constants to reflect the larger value.  We also add SVR numbers for all
of the current variants.  Finally, to make things neater, rather than
use an enormous switch statement to print out the CPU type, we create
and array of SVR/name pairs (using a macro), and print out the CPU name
that matches the SVR SOC version.

Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index ac8b018b0aaa77806064bd733a72b1e2f2f7cf54..0ac004db95c95a91bf97cdd0d2343f16f78e4dc8 100644 (file)
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004,2007 Freescale Semiconductor, Inc.
+ * Copyright 2004,2007,2008 Freescale Semiconductor, Inc.
  * (C) Copyright 2002, 2003 Motorola Inc.
  * Xianghua Xiao (X.Xiao@motorola.com)
  *
@@ -30,6 +30,39 @@
 #include <command.h>
 #include <asm/cache.h>
 
+struct cpu_type {
+       char name[15];
+       u32 soc_ver;
+};
+
+#define CPU_TYPE_ENTRY(x) {#x, SVR_##x}
+
+struct cpu_type cpu_type_list [] = {
+       CPU_TYPE_ENTRY(8533),
+       CPU_TYPE_ENTRY(8533_E),
+       CPU_TYPE_ENTRY(8540),
+       CPU_TYPE_ENTRY(8541),
+       CPU_TYPE_ENTRY(8541_E),
+       CPU_TYPE_ENTRY(8543),
+       CPU_TYPE_ENTRY(8543_E),
+       CPU_TYPE_ENTRY(8544),
+       CPU_TYPE_ENTRY(8544_E),
+       CPU_TYPE_ENTRY(8545),
+       CPU_TYPE_ENTRY(8545_E),
+       CPU_TYPE_ENTRY(8547_E),
+       CPU_TYPE_ENTRY(8548),
+       CPU_TYPE_ENTRY(8548_E),
+       CPU_TYPE_ENTRY(8555),
+       CPU_TYPE_ENTRY(8555_E),
+       CPU_TYPE_ENTRY(8560),
+       CPU_TYPE_ENTRY(8567),
+       CPU_TYPE_ENTRY(8567_E),
+       CPU_TYPE_ENTRY(8568),
+       CPU_TYPE_ENTRY(8568_E),
+       CPU_TYPE_ENTRY(8572),
+       CPU_TYPE_ENTRY(8572_E),
+};
+
 int checkcpu (void)
 {
        sys_info_t sysinfo;
@@ -39,47 +72,26 @@ int checkcpu (void)
        uint fam;
        uint ver;
        uint major, minor;
+       int i;
        u32 ddr_ratio;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
 
        svr = get_svr();
-       ver = SVR_VER(svr);
+       ver = SVR_SOC_VER(svr);
        major = SVR_MAJ(svr);
        minor = SVR_MIN(svr);
 
        puts("CPU:   ");
-       switch (ver) {
-       case SVR_8540:
-               puts("8540");
-               break;
-       case SVR_8541:
-               puts("8541");
-               break;
-       case SVR_8555:
-               puts("8555");
-               break;
-       case SVR_8560:
-               puts("8560");
-               break;
-       case SVR_8548:
-               puts("8548");
-               break;
-       case SVR_8548_E:
-               puts("8548_E");
-               break;
-       case SVR_8544:
-               puts("8544");
-               break;
-       case SVR_8544_E:
-               puts("8544_E");
-               break;
-       case SVR_8568_E:
-               puts("8568_E");
-               break;
-       default:
+
+       for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++)
+               if (cpu_type_list[i].soc_ver == ver) {
+                       puts(cpu_type_list[i].name);
+                       break;
+               }
+
+       if (i == ARRAY_SIZE(cpu_type_list))
                puts("Unknown");
-               break;
-       }
+
        printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr);
 
        pvr = get_pvr();
@@ -142,10 +154,9 @@ int checkcpu (void)
                printf("LBC: unknown (lcrr: 0x%08x)\n", lcrr);
        }
 
-       if (ver == SVR_8560) {
-               printf("CPM:  %lu Mhz\n",
-                      sysinfo.freqSystemBus / 1000000);
-       }
+#ifdef CONFIG_CPM2
+       printf("CPM:  %lu Mhz\n", sysinfo.freqSystemBus / 1000000);
+#endif
 
        puts("L1:    D-cache 32 kB enabled\n       I-cache 32 kB enabled\n");
 

diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index bf4e651aaf2baa8f02845d18de0b474e64b9310b..3c7476445d01e1093a2484b83628167ac9bd836f 100644 (file)
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -69,7 +69,7 @@ checkcpu(void)
        printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr);
 
        svr = get_svr();
-       ver = SVR_VER(svr);
+       ver = SVR_SOC_VER(svr);
        major = SVR_MAJ(svr);
        minor = SVR_MIN(svr);
 

diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index b7a5b288068d4208cfe3ae96b41c2da130d6a3db..544cc010dba5a17fde644f82c9205f9b66639f74 100644 (file)
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -879,22 +879,42 @@
 #define SVR_MAJ(svr)   (((svr) >>  4) & 0xF)   /* Major revision field*/
 #define SVR_MIN(svr)   (((svr) >>  0) & 0xF)   /* Minor revision field*/
 
+/* Some parts define SVR[0:23] as the SOC version */
+#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFF)     /* SOC Version fields */
+
 
 /*
- * SVR_VER() Version Values
+ * SVR_SOC_VER() Version Values
  */
 
-#define SVR_8540       0x8030
-#define SVR_8560       0x8070
-#define SVR_8555       0x8079
-#define SVR_8541       0x807A
-#define SVR_8544       0x8034
-#define SVR_8544_E     0x803C
-#define SVR_8548       0x8031
-#define SVR_8548_E     0x8039
-#define SVR_8610       0x80A0
-#define SVR_8641       0x8090
-#define SVR_8568_E     0x807D
+#define SVR_8533       0x803400
+#define SVR_8533_E     0x803C00
+#define SVR_8540       0x803000
+#define SVR_8541       0x807200
+#define SVR_8541_E     0x807A00
+#define SVR_8543       0x803200
+#define SVR_8543_E     0x803A00
+#define SVR_8544       0x803401
+#define SVR_8544_E     0x803C01
+#define SVR_8545       0x803102
+#define SVR_8545_E     0x803902
+#define SVR_8547_E     0x803901
+#define SVR_8548       0x803100
+#define SVR_8548_E     0x803900
+#define SVR_8555       0x807100
+#define SVR_8555_E     0x807900
+#define SVR_8560       0x807000
+#define SVR_8567       0x807600
+#define SVR_8567_E     0x807E00
+#define SVR_8568       0x807500
+#define SVR_8568_E     0x807D00
+#define SVR_8572       0x80E000
+#define SVR_8572_E     0x80E800
+
+#define SVR_8610       0x80A000
+#define SVR_8641       0x809000
+#define SVR_8641D      0x809001
+
 
 
 /* I am just adding a single entry for 8260 boards.  I think we may be