Convert CONFIG_TPL_TEXT_BASE to Kconfig

This converts the following to Kconfig:
   CONFIG_TPL_TEXT_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index da6871eb182b65de5e61131aacd2162b427ce90b..c4645a0e4c5f1d52620f9e5a3a89538361914f2d 100644 (file)
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -8,7 +8,6 @@ config ROCKCHIP_PX30
        select SPL
        select TPL
        select TPL_TINY_FRAMEWORK if TPL
-       select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
        select TPL_NEEDS_SEPARATE_STACK if TPL
        imply SPL_SEPARATE_BSS
        select SPL_SERIAL
@@ -80,7 +79,6 @@ config ROCKCHIP_RK322X
        select TPL
        select TPL_DM
        select TPL_OF_LIBFDT
-       select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
        select TPL_NEEDS_SEPARATE_STACK if TPL
        select SPL_DRIVERS_MISC
        imply ROCKCHIP_COMMON_BOARD
@@ -112,7 +110,6 @@ config ROCKCHIP_RK3288
        imply TPL_DRIVERS_MISC
        imply TPL_LIBCOMMON_SUPPORT
        imply TPL_LIBGENERIC_SUPPORT
-       imply TPL_NEEDS_SEPARATE_TEXT_BASE
        imply TPL_NEEDS_SEPARATE_STACK
        imply TPL_OF_CONTROL
        imply TPL_OF_PLATDATA
@@ -160,7 +157,6 @@ config ROCKCHIP_RK3328
        select SPL
        select SUPPORT_TPL
        select TPL
-       select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
        select TPL_NEEDS_SEPARATE_STACK if TPL
        imply ROCKCHIP_COMMON_BOARD
        imply ROCKCHIP_SDRAM_COMMON
@@ -183,7 +179,6 @@ config ROCKCHIP_RK3368
        select ARM64
        select SUPPORT_SPL
        select SUPPORT_TPL
-       select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
        select TPL_NEEDS_SEPARATE_STACK if TPL
        imply ROCKCHIP_COMMON_BOARD
        imply SPL_ROCKCHIP_COMMON_BOARD
@@ -216,7 +211,6 @@ config ROCKCHIP_RK3399
        select SPL_RAM if SPL
        select SPL_REGMAP if SPL
        select SPL_SYSCON if SPL
-       select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
        select TPL_NEEDS_SEPARATE_STACK if TPL
        select SPL_SEPARATE_BSS
        select SPL_SERIAL

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 17ce2f6b615dafe8c2fbbec3827e744980250561..4a739a742154b96fa8fda065d3c28f9869b621c0 100644 (file)
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1351,14 +1351,6 @@ config TPL_LDSCRIPT
          May be left empty to trigger the Makefile infrastructure to
          fall back to the linker-script used for the SPL stage.
 
-config TPL_NEEDS_SEPARATE_TEXT_BASE
-       bool "TPL needs a separate text-base"
-       depends on TPL
-       help
-         Enable, if the TPL stage should not inherit its text-base
-         from the SPL stage.  When enabled, a base address for the
-         .text sections of the TPL stage has to be set below.
-
 config TPL_NEEDS_SEPARATE_STACK
        bool "TPL needs a separate initial stack-pointer"
        depends on TPL
@@ -1380,7 +1372,6 @@ config TPL_POWER
 
 config TPL_TEXT_BASE
        hex "Base address for the .text section of the TPL stage"
-       depends on TPL_NEEDS_SEPARATE_TEXT_BASE
        help
          The base address for the .text section of the TPL stage.
 

diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 052b93d1916c31c7a1f347e26808cbe31c3239b7..4a85dbab16dbe1d3bbed4be6fee478363151cbdb 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xD0001000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC=y

diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index b18da3f1e6570cdaedb026ee60423489cde10f66..e2e78d41ccbd2e0ad9a94c12d2afdb8547cd2359 100644 (file)
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xD0001000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC=y

diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 1ee304b0b00d118543f5130cbdfb15bfe2961340..00724e042050ce7de50646df3fb7ea8caa83d086 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xD0001000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC=y

diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 70565e73d0fe4ade6a719794cf0f106096890cdc..656bd3b757433202b9301bf92e15fcab56b50bb5 100644 (file)
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xD0001000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC=y

diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index eeb174a7411332fb282aa7052871c880ae6ca402..2e7d0b2921361a13f7f90c471695eac301e8cb4a 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xF8F81000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y

diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 39a2710a0e8facd07e113c9646193267c250d3ac..2529685724710aee7ed4b9e811a26bc5db0e6bfc 100644 (file)
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xF8F81000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y

diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index cc3a1f67ee4157086a1f7dbd1d564ba4e6035fd0..130dea9ce938230dbfbb3156aa835c003b124d83 100644 (file)
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xF8F81000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y

diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index d365f4e8ed07af206b012661e3cf73c65cff0acf..ef85cf0450561b2cca5d780fef2cadd801e4b338 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xF8F81000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y

diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 19b76ee3cf6c42624c421919dc686c4f6e71046e..c9abf3dd968f472edf046aa71d9d00041bfbd8e6 100644 (file)
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
+CONFIG_TPL_TEXT_BASE=0xF8F81000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y

diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig
index 2dd37f64c00cbd075dd3dce4fe73a75fa7b93d08..785314a362568db5fd9e46b2e238ec08a29dba67 100644 (file)
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -6,6 +6,7 @@ CONFIG_MAX_CPUS=8
 CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral"
 CONFIG_SPL_TEXT_BASE=0xfef10000
+CONFIG_TPL_TEXT_BASE=0xffff8000
 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000
 CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000
 CONFIG_DEBUG_UART_BOARD_INIT=y

diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig
index 3cc25b5373ef1e31ddde0c19e89bcde71bcaae65..c3c133baee0cea1610a8540fa9f5dbc9fdedb329 100644 (file)
--- a/configs/chromebook_samus_tpl_defconfig
+++ b/configs/chromebook_samus_tpl_defconfig
@@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus"
 CONFIG_SPL_TEXT_BASE=0xffe70000
+CONFIG_TPL_TEXT_BASE=0xfffd8000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 3a9672bf53e7dfc2f6c4e19ba81afd8e938f1a2a..838cdeed568331cb50561d995d034a81a0bcab1c 100644 (file)
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -70,7 +70,6 @@
 #define CONFIG_SPL_NAND_INIT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE            (128 << 10)
-#define CONFIG_TPL_TEXT_BASE           0xD0001000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (576 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     (0x11000000)
@@ -102,7 +101,7 @@
 #endif
 
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_TPL_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        0xD0001000
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_MONITOR_BASE        CONFIG_SPL_TEXT_BASE
 #else

diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h
index 27e60d8f586937f767b13981a49a648ed4427798..0eeea80b32f498b6eaf91990ea186f61bd52ce85 100644 (file)
--- a/include/configs/chromebook_coral.h
+++ b/include/configs/chromebook_coral.h
@@ -18,8 +18,6 @@
                                        "stdout=vidconsole,serial\0" \
                                        "stderr=vidconsole,serial\0"
 
-#define CONFIG_TPL_TEXT_BASE           0xffff8000
-
 #define CONFIG_SYS_NS16550_MEM32
 #undef CONFIG_SYS_NS16550_PORT_MAPPED
 

diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h
index 2fe3e721993201d36953e9040b2196c575285e5b..9d5a63cabaab9780eaa3aeac36fe5f9cdffb6839 100644 (file)
--- a/include/configs/chromebook_samus.h
+++ b/include/configs/chromebook_samus.h
@@ -23,6 +23,4 @@
                                        "stdout=vidconsole,serial\0" \
                                        "stderr=vidconsole,serial\0"
 
-#define CONFIG_TPL_TEXT_BASE           0xfffd8000
-
 #endif /* __CONFIG_H */

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 33f052d7dde099eec5f593eb62c0da93762de703..b907a1ac8b3521a77400cd14e8459b764be71937 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -102,7 +102,6 @@
 #define CONFIG_SPL_NAND_INIT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE            (128 << 10)
-#define CONFIG_TPL_TEXT_BASE           0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     (0x11000000)
@@ -130,7 +129,7 @@
 
 #ifndef CONFIG_SYS_MONITOR_BASE
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_TPL_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        0xf8f81000
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_MONITOR_BASE        CONFIG_SPL_TEXT_BASE
 #else